Check patentability & draft patents in minutes with Patsnap Eureka AI!

Memory element and injection method for memory selecting hot carriers of NAND gate flash memory

A technology of memory elements and carriers, applied in information storage, static memory, instruments, etc., can solve problems such as inconvenience, increased manufacturing costs, general products and methods without suitable structures and methods, etc.

Active Publication Date: 2012-02-08
MACRONIX INT CO LTD
View PDF6 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This additional high-voltage transistor and its companion transistors for logic and other data flow in the same integrated circuit create increased process complexity
This will increase the manufacturing cost of the device
[0005] This shows that the above-mentioned existing flash memory device obviously still has inconvenience and defects in product structure and use, and needs to be further improved urgently
In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and there is no suitable structure and method for general products and methods to solve the above-mentioned problems. This is obviously a problem that relevant industry players are eager to solve

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Memory element and injection method for memory selecting hot carriers of NAND gate flash memory
  • Memory element and injection method for memory selecting hot carriers of NAND gate flash memory
  • Memory element and injection method for memory selecting hot carriers of NAND gate flash memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0085] In order to further illustrate the technical means and effects that the present invention takes to achieve the intended invention purpose, below in conjunction with the accompanying drawings and preferred embodiments, the selection memory heat load of the memory element and the NAND flash memory proposed according to the present invention The specific implementation, structure, method, steps, features and effects of the sub-injection method are described in detail below.

[0086] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of preferred embodiments with reference to the drawings. Through the description of the specific implementation mode, a more in-depth and specific understanding of the technical means and effects adopted by the present invention to achieve the intended purpose can be obtained. However, the accompanying drawings are only for reference and d...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a memory element and an injection method for memory selecting hot carriers of an NAND gate flash memory. The memory element described by the invention comprises a plurality of memory cells which are arranged in a manner of series connection in a semiconductor main body, such as an NAND array, and has a plurality of word lines. One selected memory cell is programmed through hot-carrier injection; and the hot carriers are generated by building a heating electric field with the adoption of the electric potential of a lifting channel to cross over a channel of the selected memory cell. The hot-carrier injection of the lifting channel is realized by blocking current of the selected memory cell from a first side to a second side in the NAND array; the voltage of a main body zone of a first semiconductor is boosted per se to a self-boost voltage through a capacitive coupling; a main body zone of a second semiconductor is biased to a reference voltage step; a programmed electric potential which is more than a channel hot-carrier injection energy barrier step is applied to select memory cells so that energy carriers can detent and claim for the memory cells from the main body zone of the second semiconductor so as to generate the hot-carrier injection.

Description

technical field [0001] The invention relates to a flash memory technology, in particular to an operation technique suitable for low-voltage programming and erasing operations in a NAND gate configuration. Background technique [0002] Flash memory is a type of non-volatile integrated circuit memory technology. Traditional flash memory uses floating gate memory cells. As the density of memory devices increases, the floating gate memory cells get closer together, and the interaction of charges stored in adjacent floating gates will cause problems, thus forming a limit, making the use of floating gate flash memory density Unable to raise. Another type of memory cell used in flash memory is called a charge-trapping memory cell, which uses a charge-trapping layer instead of a floating gate. Charge-trapping memory cells use charge-trapping materials, which do not cause mutual influence between individual memory cells like floating gates, and can be applied to high-density flash...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C16/10G11C16/08
Inventor 黄竣祥蔡文哲
Owner MACRONIX INT CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More