Method for producing semiconductor device
A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., capable of solving problems affecting the performance of semiconductor devices and not being able to completely remove the barrier layer 500
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Embodiment 1
[0039] refer to Figure 7 As shown, the present embodiment provides a method for manufacturing a semiconductor device, including:
[0040] Step S1, providing a semiconductor substrate;
[0041] Step S2, forming a shallow trench isolation structure in the semiconductor substrate, and the shallow trench isolation structure is used to define a dummy active region and an active region;
[0042] Step S3, forming a barrier layer on the semiconductor substrate, the distance between the upper surface of the dummy active region and the upper surface of the barrier layer is a first thickness, and the lateral width of the dummy active region is smaller than the first thickness. 1.4 times the thickness.
[0043] First execute step S1, refer to Figure 8 As shown, a semiconductor substrate 10 is provided.
[0044] Specifically, the semiconductor substrate 10 may be a silicon substrate, a silicon germanium substrate or a silicon-on-insulator structure, or other semiconductor material su...
Embodiment 2
[0064] refer to Figure 15 As shown, this embodiment is used to form a polysilicon gate, which specifically includes the following steps:
[0065] Step S11, providing a semiconductor substrate;
[0066] Step S2, forming a shallow trench isolation structure in the semiconductor substrate, and the shallow trench isolation structure is used to define a dummy active region and an active region;
[0067] Step S13, forming an oxide layer on the semiconductor substrate;
[0068] Step S14, forming a barrier layer on the oxide layer, the distance between the upper surface of the dummy active region and the upper surface of the barrier layer is a first thickness, and the lateral width of the dummy active region is smaller than the first thickness. 1.4 times the thickness;
[0069] Step S15, forming a polysilicon layer on the barrier layer;
[0070] Step S16, forming a via hole on the polysilicon layer corresponding to the active region;
[0071] Step S17, filling the through hole w...
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