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Field programmable gate array (FPGA)-based hardware phase discrimination circuit

A phase detection and circuit technology, applied in the field of measurement, can solve problems such as the complexity of frequency multiplication circuits, and achieve the effects of simple structure, good stability, and simplified output

Active Publication Date: 2013-08-28
SHANGHAI MARINE EQUIP RES INST
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  • Claims
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Problems solved by technology

[0003] The present invention is aimed at the complex problem of the frequency multiplication circuit of the photoelectric angle position sensor FPGA, and proposes a hardware phase detection circuit based on FPGA, which simultaneously outputs the phase difference and direction of two signals as one signal, simplifies the output, and optimizes the circuit

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  • Field programmable gate array (FPGA)-based hardware phase discrimination circuit

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Embodiment Construction

[0007] Such as figure 1 As shown, an FPGA-based hardware phase detection circuit, the input signal terminals PA and PB are respectively connected to the input terminal 1 of the NOT gate A1 and the input terminal 1 of the NOT gate A2, and the output terminal 2 of the NOT gate A1 is connected to the NAND gate The input terminal 2 of B1 and the output terminal 3 of the NAND gate B1 are respectively connected to the input terminal 1 of the NAND gate B3 and the setting terminal 3 of the D flip-flop C1, and the input terminal 1 of the D flip-flop C1 is connected to the clock input terminal 2 To the ground terminal GND, the output terminal 4 of the D flip-flop C1 is respectively connected to the input terminal 1 of the NOT gate A3 and the input terminal 2 of the NAND gate B3, and the output terminal 3 of the NAND gate B3 is connected to the set 1 of the D flip-flop C2 Terminal 3, the input terminal 1 and the clock input terminal 2 of the D flip-flop C2 are connected to the ground ter...

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Abstract

The invention relates to a field programmable gate array (FPGA)-based hardware phase discrimination circuit, which comprises two D triggers, four NAND gates and four NOT gates. All circuit function units are realized by combining FPGA internal logic gates, and can be modified by software programming. The circuit has only one path of output, the path of output comprises a phase difference between two paths of signals and the direction of the phase difference, and the positiveness and negativeness of the direction correspond to the two conditions of signal lead and signal lag. When the lead andlag of the two paths of signals are inconstant, the circuit cannot accurately extract the phase difference of the two paths of signals. However, the lead and the lag can be effectively ensured to be constant by regulating an initial phase difference between the two paths of signals to be equal to 180 degrees, thereby accurately extracting the magnitude and direction of the phase difference between the two paths of signals by utilizing the phase discrimination circuit. The circuit has the advantages of simple structure, ingenious design and high stability; and when used for FPGA application, the circuit provided by the invention can rapidly and accurately discriminate the phase difference between the two paths of signals.

Description

technical field [0001] The invention relates to a measurement technology, in particular to an FPGA-based hardware phase detection circuit. Background technique [0002] At present, there are generally two methods for FPGA-based phase detection circuits, both of which use two outputs: one is to output the direction and the other is to output the pulse; the other is to output the forward pulse and the reverse pulse. The circuit design is relatively complicated, and the circuit output is not simplified enough. Contents of the invention [0003] The present invention is aimed at the complex problem of the frequency multiplication circuit of the photoelectric angle position sensor FPGA, and proposes a hardware phase detection circuit based on FPGA, which simultaneously outputs the phase difference and direction of two signals as one signal, simplifies the output, and optimizes the circuit . [0004] The technical solution of the present invention is: a hardware phase detectio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/125G01R25/00
Inventor 倪昔东吉小军徐姝菁朱俊林静蔡怡
Owner SHANGHAI MARINE EQUIP RES INST