Digital analog converter and digital analog conversion method

A digital-to-analog converter, digital-to-analog conversion technology, applied in the direction of digital-to-analog converters, etc., can solve the problems of asynchronous switching, affecting system performance, large dynamic error, etc., to reduce dynamic errors and switching jumps. Effect

Active Publication Date: 2014-01-08
PEKING UNIV
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Problems solved by technology

[0003] However, traditional DEM encoding methods (such as Full Random DEM, FRDEM) will drastically increase the number of switches per sampling period, and too many switch transitions will cause large dynamic errors (switch transitions are not synchronized, clock feedthrough, etc.), which also affects the performance of the system

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  • Digital analog converter and digital analog conversion method
  • Digital analog converter and digital analog conversion method
  • Digital analog converter and digital analog conversion method

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Embodiment Construction

[0029] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0030] figure 2 It is a structural diagram of a digital-to-analog converter according to an embodiment of the present invention. The structure of the digital-to-analog converter is a complete binary tree with n+1 layers, and the root node of the complete binary tree is connected to an n+1 bit The input terminal of the digital signal data is connected, the complete binary tree has 2 n leaf nodes, and each leaf node is a 1-bit DAC unit, other nodes S in the complete binary tree except leaf nodes i,j are coding submodules, the 2 n The outputs of each leaf node are connected to the accumulator.

[0031] Preferably, every node S in the complete binary tree except leaf node...

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Abstract

The invention, which relates to the digital signal processing technology field, discloses a digital analog converter (DAC) and a digital analog conversion method. The structure of the digital analog converter is a complete binary tree with n+1 layers; a root node of the complete binary tree is connected with an input terminal of digital signal data of (n+1) bits. Besides, the complete binary tree has 2 <n> leaf nodes and each of the leaf node is a one-bit DAC unit; other node except the leaf nodes in the complete binary tree are coding submodules; and output terminals of the 2 <n> leaf nodes are connected with an accumulator. According to the invention, the DAC and a dynamic element matching (DEM) coding conversion scheme based on the DAC in the method are employed; therefore, too much switch jumping during the implementation of the digital analog conversion method can be reduced; and an effect of reduction of dynamic errors is realized; and moreover, outputting of DEM coding has certain randomness, so that distortion caused by mismatching can be converted into noises.

Description

technical field [0001] The invention relates to the technical field of digital signal processing, in particular to a digital-to-analog converter and a digital-to-analog conversion method. Background technique [0002] Due to the deviation of the production process and the inconsistency of the working temperature and voltage, the chip components (such as transistor size, threshold voltage and resistance value, etc.) will be mismatched, which will seriously affect the performance of the system, especially the linearity. DEM (Dynamic Element Matching, Dynamic Element Matching) coding method can convert the distortion caused by component mismatch into noise, thereby effectively improving the linearity of the system, so it is widely used in ADCs and DACs of various structures. figure 1 It is a working schematic diagram of a traditional digital-to-analog converter (DAC) including a DEM module. Such as figure 1 As shown, after the digital input of the DAC is coded by the DEM modu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/66
Inventor 苏炜王源郭广亮赵俊雷贾嵩张兴
Owner PEKING UNIV
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