Testing system and method for mixed-mode IC (integrated circuit)
An integrated circuit and mixed-mode technology, which is applied in the test system field of mixed-mode integrated circuits, can solve problems such as difficulty in collecting data for analysis, increase in test cost, difficulty in increasing memory size, etc.
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[0026] Figure 4 It is a block diagram of a mixed-mode integrated circuit (mixed-mode IC) test system 400 of the present invention, the mixed-mode integrated circuit test system 400 includes a mixed-mode integrated circuit 410 and an automatic test device 420 .
[0027] The mixed-mode integrated circuit 410 includes an analog-to-digital converter 411 , a phase-locked loop 413 , a timing pin 415 , a FIFO buffer 417 , and a control circuit 419 .
[0028] The analog-to-digital converter 411 receives a test signal and converts the test signal into a digital input data ADO[n-1:0].
[0029] The PLL 413 receives a first external timing signal XI to generate an input timing signal clk_i, wherein the frequency of the input timing signal clk_i may be an integer multiple of the frequency of the first external timing signal XI, for example, the frequency of the input timing signal clk_i The frequency may be 3 times or 4 times the frequency of the first external timing signal XI, or the f...
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