Semiconductor device containing power device and preparation method thereof
A technology of power devices and semiconductors, which is applied in the field of semiconductor devices including power devices and its preparation, which can solve the problems of large parasitic resistance, high current density, and unsatisfactory requirements, and achieve the effect of reducing parasitic resistance and increasing current density
Active Publication Date: 2014-05-28
WUXI ZGMICRO ELECTRONICS CO LTD
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Problems solved by technology
[0005] However, in actual use, it is found that lower on-resistance and higher current density are often required in the design of power devices. The conventional technology uses standard-sized contact holes to generate larger parasitic resistance, resulting in lower current density of power devices. , unable to meet the needs of some application scenarios
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[0031] The detailed description of the present invention directly or indirectly simulates the operation of the technical solution of the present invention mainly through programs, steps, logic blocks, processes or other symbolic descriptions. In the ensuing description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. Rather, the invention may be practiced without these specific details. These descriptions and representations herein are used by those skilled in the art to effectively convey the substance of their work to others skilled in the art. In other words, for the purpose of avoiding obscuring the present invention, well-known methods, procedures, components and circuits have not been described in detail since they are readily understood.
[0032] Reference herein to "one embodiment" or "an embodiment" refers to a particular feature, structure or characteristic that can be included in at least one implementa...
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The invention, which belongs to the semiconductor manufacturing filed, discloses a semiconductor device containing a power device and a preparation method thereof. The semiconductor device comprises an MOS tube. The MOS tube includes gates, sources and drains, wherein the sources and the drains are distributed at two sides of the gates; and contact holes are formed on the sources and the drains, wherein the sizes of the contact holes are greater than sizes of contact holes in a standard technology. According to the semiconductor device containing a power device in the invention, the power device is provided with contact holes, wherein the sizes of the contact holes are greater than sizes of contact holes in a standard technology; therefore, parasitic resistances of the contact holes in the power device are obviously reduced, thereby improving current density of the power device.
Description
【Technical field】 [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device including a power device and a preparation method thereof. 【Background technique】 [0002] Power devices are one of the more common devices in integrated circuits. Power devices may include high-power NMOS transistors (NMOSFET, N-type metal oxide field effect transistors) and PMOS transistors (PMOSFET, P-type metal oxide field effect transistors). [0003] Please refer to figure 1 , which shows a schematic layout of an NMOS transistor 100 in the prior art. The NMOS tube 100 can be prepared by a planar process and a self-aligned process. The NMOS transistor 100 includes three electrodes, namely a source (source), a drain (drain) and a gate (gate). In the illustrated layout, the gate 101 is located between the source 102 and the drain 103 for separating the source 102 and the drain 103 . The layout area of the gate 101 includes several para...
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IPC IPC(8): H01L29/41H01L29/78H01L21/28H01L21/336
Inventor 王钊
Owner WUXI ZGMICRO ELECTRONICS CO LTD