Embedded digital ip strip chip

Abstract

An integrated circuit (IC) is provided. The IC includes a first region having an array of programmable logic cells. The IC also includes a second region incorporated into the IC and in communication with the first region. The second region includes standard logic cells and base cells. In one embodiment, the standard logic cells are assembled or interconnected to accommodate known protocols. The base cells include configurable logic to adapt to modifications to emerging communication protocols, which are supported by the base cells. The second region can be embedded in the first region in one embodiment. In another embodiment, the second region is defined around a perimeter of the first region. The configurable logic may be composed of hybrid logic elements that have metal mask programmable interconnections so that as emerging communication protocols evolve and are modified, the IC can be modified to accommodate to the changes in the protocol. In another embodiment, a generic device can be customized by replacing the original function with a completely new function targeting a specific application space, e.g., replacing the original function such as a PCI Express, used for computing based applications, with 4OG / 10OG Ethernet and Interlaken, used in wireline applications. A method of designing an integrated circuit is also provided.

Description

Background technique [0001] Programmable logic devices such as field-programmable gate arrays (FPGAs) are commonly used as prototyping platforms, but have generally been replaced by application-specific integrated circuits (ASICs), primarily due to cost and power as products are developed to high volumes . Vendors typically offer customers a migration path to prototyping in FPGAs, and then reduce cost and power by converting the design to a structured ASIC when the design is stable. In addition, once the standardization matures, hard macros (eg, PCI-Express 2.0 standard blocks) that reside directly within FPGAs representing large numbers of digital logic blocks are embedded in programmable logic devices. [0002] In either case, as emerging protocols are being developed to facilitate new high-bandwidth applications, there is a need to rapidly prototype functionality and bring viable products to market. Time to market is critical for product adoption. Cost and power are also...

AI Technical Summary

Problems solved by technology

Thus, both migration paths and embedded hard macros have disadvantages for emerging protocols because there is a balance between the need to determine migration or provide hard macros and the need for flexibility as emerging protocols evolve

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