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Batch testing method for complex programmable logic device

A technology of programming logic and batch testing, applied in circuit breaker testing, electronic circuit testing, instruments, etc., to save testing time, improve testing efficiency, and reduce testing costs

Active Publication Date: 2012-05-23
北京自动测试技术研究所有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But, do not utilize JTAG interface to realize the solution of CPLD batch test in the prior art

Method used

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  • Batch testing method for complex programmable logic device
  • Batch testing method for complex programmable logic device
  • Batch testing method for complex programmable logic device

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Experimental program
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Embodiment Construction

[0043] The basic train of thought of the CPLD batch test method provided by the present invention is: at first obtain the programming file of CPLD and the test emulation file with EDA tool software according to fault model, the programming file of CPLD is changed and decomposed and converted into ATE recognizable programming vector, will The corresponding test simulation files are converted into test vectors recognizable by ATE, and all vectors are loaded to the automatic test equipment at one time, and online programming and testing for multiple fault models of CPLD are realized on ATE. During the test process, each CPLD under test is only connected to ATE Once, the operation time is saved, and the test efficiency is improved through the parallel test technology, and the mass production test of CPLD is realized.

[0044] In order to realize the above-mentioned technical ideas, it is the first choice to adopt mid-to-high-end integrated circuit automatic test equipment (abbrevia...

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Abstract

The invention discloses a batch testing method for complex programmable logic device. Aiming at the characteristic that CPLD (Complex Programmable Logic Device) shall be used after programming, the programming and test of CPLD are unified by the batch testing method to realize the batch testing of CPLD via ATE (Automatic Test Equipment). The JTAG (Joint Test Action Group) programming file and emulation file aiming to the fault model are obtained via the development software of CPLD to be converted to the vector file respectively distinguished by ATE. The number of the parallel test devices shall be determined before starting the batch testing; and all vectors are loaded to ATE at once. While the batch testing is processed, each CPLD to be tested is only connected with an automatic testingdevice once to execute the programming vector and the test vector repeatedly, so that the tests of a plurality of fault models are realized. In the batch testing method for complex programmable logicdevice, the online programming and test of CPLD are realized based on the ATE, the requirements of the mass testing of CPLD are satisfied via the parallel test technology, so that the testing cost isreduced and the testing efficiency is improved.

Description

technical field [0001] The invention relates to a batch testing method for integrated circuits, in particular to a batch testing method for Complex Programmable Logic Devices (CPLD for short), and belongs to the technical field of integrated circuit testing. Background technique [0002] Testing is an essential but time-consuming and expensive process in the fabrication of integrated circuits. It is one of the key means to ensure the performance and quality of integrated circuits. In recent years, with the development of semiconductor technology, the integration and complexity of integrated circuits have become higher and higher, and integrated circuit testing technology has gradually developed from testing small-scale integrated circuits to testing medium-scale, large-scale and ultra-large-scale integrated circuits. The requirements for test efficiency are increasing day by day. [0003] Complex Programmable Logic Device (CPLD), as the current mainstream development of di...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/327G01R31/3183
Inventor 郭士瑞冯建科张东高剑蒋常斌李瑞麟李杰于明生晓坤
Owner 北京自动测试技术研究所有限公司
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