Software fault-tolerant method capable of comprehensively on-line self-detection single event upset
A single-event flipping and software fault-tolerant technology, which is applied to the generation of response errors, instruments, and electrical digital data processing, etc., to achieve comprehensive effects of saving hardware and time costs, improving efficiency, and counting the number of single-event flipping times
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[0064] The following is a specific implementation description by using more DSP 6X series processors.
[0065] 1. Perform memory address link configuration
[0066] After the DSP processor chip is reset, according to the memory mapping relationship, the ROM loading mode is adopted to move all the codes in the ROM space to the address of the program memory space through the processor chip. As shown in the accompanying drawings figure 1 shown.
[0067] The corresponding situation of the load address segment: ROM_B area places the program code including all application programs, and the program code of the fault-tolerant processing parameter generation module and the fault-tolerant processing A module. When the program is running, it is loaded in the corresponding program memory RAM_B area; The program code of the B module is loaded into the corresponding program memory RAM_A area when the program is running, and the ROM_B area and ROM_A area are determined according to the siz...
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