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Via Formation Method

A technology of electrode and film layer structure, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of single process field and complex process parameter setting, so as to increase the process window, maintain stability, and expand line width Effect

Active Publication Date: 2017-03-15
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the electrode structure and parameters of the etching equipment have a great influence on the formation process of the through hole, there have been many researches in the industry, but they mainly focus on the equipment level, such as the shape and position of the electrode. For example, the patent number is US7728252 The U.S. patent proposed a method of introducing a floating electrode into the vacuum chamber to achieve high-selectivity anisotropic etching of deeper structures, but this method requires the modification of the equipment chamber, and in terms of process parameter settings It is also relatively complex, and the applicable process field is also relatively single

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Experimental program
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Embodiment 1

[0029] The via hole forming method of this embodiment includes the following processes:

[0030] First, if figure 1 As shown, an etch stop layer 110 is formed on the substrate 100 by conventional processes such as plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD), and the etch stop layer 110 may be Silicon nitride (Si 3 N 4 ), NDC and other single-layer films or composite films, the thickness is In this implementation, the etch stop layer 110 is silicon nitride with a thickness of Processes such as plasma-enhanced chemical vapor deposition (PECVD) and low-pressure chemical vapor deposition (LPCVD) are well known to those skilled in the art, and will not be repeated here.

[0031] Next, please continue to refer to figure 1 Form an interlayer dielectric layer 200 on the etch stop layer 110 by conventional processes such as plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD), ...

Embodiment 2

[0039] The difference between this embodiment and Embodiment 1 is that, as in figure 1 In the entire etching process shown (that is, the etching process of DARC 210 and interlayer dielectric layer 200), the temperature of the lower electrode is dynamically adjusted, that is, the temperature is gradually increased (ramp), and the temperature of the lower electrode changes with time. Figure 4 shown. The main etching and over-etching are integrated into one etching process. In the initial stage of etching (equivalent to the original main etching step), the temperature rise is slower, and in the later stage of the etching process (equivalent to the original over-etching step), the temperature rise is slower. Fast, that is, the slope gradually increases during the whole process. In this embodiment, the optional range of the initial temperature is 15-25°C, preferably 20°C, and the optional range of the end temperature is 35-50°C, preferably 40°C, and the morphology of the through ...

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Abstract

The invention provides a method for forming a through hole. According to the method, the temperature of an upper electrode and / or a lower electrode of etching equipment in a through hole etching process is dynamically adjusted; the generated amount of polymer in the etching process can be adjusted; the line width at the bottom of the through hole is enlarged to obtain more vertical morphology; and a process window is increased, the etching stop phenomenon is avoided and the stability of the electrical performance is maintained. During the process, the electrode temperature is used as a new process parameter; and a process menu is only needed to be locally adjusted and no new process flow is increased, so that the remarkable influences on the yield and the production cost are avoided.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for forming a through hole. Background technique [0002] With the development of integrated circuits to deep submicron dimensions, the density of devices and the complexity of processes are increasing, and strict control of the process becomes more important. Among them, the through hole is used as the interconnection between the multi-layer metal layers and the connection channel between the active area of ​​the device and the external circuit. Because it plays an important role in the composition of the device structure, the formation process of the through hole has always been known to those skilled in the art. Pay attention to. [0003] At present, in the chamber of conventional etching equipment used for through-hole manufacturing, the main components include upper and lower electrodes, chamber walls, air inlets, etc., wherein the upper an...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/3065H01L21/768
Inventor 王伟军
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT