Method for preparing shallow junction and side wall of amorphous-carbon sacrificial grid structure

Abstract

This invention provides a method for preparing a shallow junction and a side wall of an amorphous-carbon sacrificial grid structure. The method comprises the following steps: firstly, depositing a first side wall layer on a silicon substrate with a grid structure, and then directly carrying out a shallow junction ion implantation process; then, coating a layer of photoresist on the first side wall layer and carrying out patterning on the photoresist, exposing the grid structure above an N well region or a P well region, and carrying out ion light-doping on the whole device; removing the excess photoresist and the first side wall layer, depositing a second side wall layer on the bottom surface of the silicon substrate and a grid, and coating a layer of photoresist on the second side wall layer; carrying out patterning on the photoresist, exposing a grid on the other side, and carrying out ion doping on the whole device; and removing the excess photoresist and the second side wall layer, sequentially depositing a third side wall layer and a silicon nitride layer on the bottom surface of the silicon substrate and the grid, and removing the excess third side wall layer and the silicon nitride layer so as to form a side wall.

Description

technical field [0001] The invention relates to a CMOS semiconductor device integration process, in particular to a method for preparing shallow junctions and side walls of an amorphous carbon sacrificial gate structure. Background technique [0002] Chinese patent CN101593686A discloses an integrated process for preparing a metal gate, using amorphous carbon as a sacrificial gate material to form the base structure required by the Gate-last process. The specific process includes: forming a gate dielectric layer on the substrate; forming a patterned amorphous carbon layer on the gate dielectric layer; forming sidewalls surrounding the patterned amorphous carbon layer; forming a patterned the interlayer dielectric layer of the amorphous carbon layer and the sidewall; planarize the interlayer dielectric layer and expose the patterned amorphous carbon layer; remove the patterned amorphous carbon layer by using an oxygen ashing process, A trench is formed in the interlayer diel...

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Problems solved by technology

[0003] The process provided by the above patent is very simple, so many of the processes need to be refined, such as: stacked structure before gate formation; pre-treatment of sacrificial gate formation; post-treatment of sacrificial gate; conventional sidewall structure Formation process; substrate preparation during ion implantation process; SPT process treatment; CESL treatment; CMP process pretreatment, etc.

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