Clock signal generator

Abstract

An embodiment of the invention provides a clock signal generator. The clock signal generator is applied to a physical layer subsystem supporting data transmission at multiple Baud rates and comprises a source clock signal generator and two or more processors respectively connected with the output end of the source clock signal generator. The source clock signal generator outputs multiple source clock signals with same frequency according to a reference signal of a reference clock in the subsystem. The processors perform frequency de-multiplication of the multiple source clock signals through a digital logic circuit according to an over-sampling technology to obtain synchronous clock signals corresponding to the Baud rates of the data transmission in the subsystem so as to achieve a timing function and a function of transmitting and receiving data transmitted at the Baud rates. The clock signal generator is used for solving the problem that an existing clock generator in the prior art is large in occupied area and power.

Description

technical field [0001] The embodiments of the present invention relate to the communication field, and in particular, to a clock signal generator. Background technique [0002] In the current electronic system, people in the industry use Gigabit Ethernet Physical layer (English full name Gigabit Ethernet Physical layer, referred to as GEPHY) or Fast Ethernet physical layer (English full name Fast Ethernet Physical layer, referred to as FEPHY) to refer to its corresponding The circuit unit of the corresponding level. [0003] Usually, GEPHY / FEPHY must include a clock generator, which is used to solve functions such as timing, sending and receiving of data streams at various transmission rates. The current GEPHY / FEPHY clock generator needs to cover the clock signals required by two transmission rates such as 125M baud rate (Baud) and 10MBaud. [0004] The clock generator set in the existing GEPHY / FEPHY that can cover the above two transmission rates includes: two phase-locke...

AI Technical Summary

Problems solved by technology

[0006] An embodiment of the present invention provides a clock signal generator, which is used to solve the problems of high power consumption and large occupied area of ​​the clock generator in the prior art

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