Filtering noise reduction system and filtering noise reduction method based on FPGA (field programmable gate array) platform
A technology of a noise reduction system and platform, applied in the filter noise reduction system and filter noise reduction field, can solve the problems of no noise reduction algorithm, reduced noise reduction performance, and easy introduction of time domain degradation.
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[0026] The present invention will be described in detail below with reference to the drawings and examples.
[0027] figure 1 It is the data flow diagram of the filtering noise reduction system based on the FPGA platform of the present invention; figure 2 It is a schematic diagram of the filtering and denoising system based on the FPGA platform of the present invention.
[0028] The filtering and noise reduction system based on FPGA platform of the present invention comprises a template generating module, a data analysis module, a median filtering module, an average filtering module and a data output module; the template generating module includes four first-in-first-out memories FIFO1 to FIFO4 and one road data Input, four consecutive frames of video image data introduced by data input are stored in four-way first-in-first-out memory FIFO1 to FIFO4, and the above four frames of video image data and the fifth frame of video image data introduced by data input form a 5×5 neig...
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