Metal interconnection method

Abstract

The invention discloses a metal interconnection method which comprises the following steps of: etching a dielectric layer; forming a groove in the dielectric layer; depositing metal copper; filling the deposited copper in the groove, and covering the surface of the dielectric layer; polishing the metal copper to the surface of the dielectric layer by the CMP (chemical mechanical polishing) technology; forming an etching stop layer with compressive stress on the dielectric layer; and forming a barrier layer with tension stress on the etching stop layer with compressive stress. The method disclosed by the invention can reduce the influence of high-frequency power on the integrity of a gate oxide layer.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a metal interconnection method. Background technique [0002] With the development of semiconductor manufacturing technology, the area of ​​semiconductor chips is getting smaller and smaller, and at the same time, the number of semiconductor devices on a semiconductor chip is also increasing. In semiconductor circuits, signal transmission between semiconductor devices requires high-density interconnect lines. In traditional semiconductor processes, metal aluminum is generally used as metal interconnect lines between semiconductor devices. With the development of semiconductor processes, Metal aluminum interconnects have been replaced by metal copper interconnects because metal copper has a smaller resistance value compared with metal aluminum, and the use of metal copper interconnects can increase the transmission speed of signals between semiconductor devices. [0003] The metal inte...

AI Technical Summary

Problems solved by technology

In the prior art, there is no ideal solution to the problem of high frequency power affecting the integrity of the gate oxide layer

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