Preparation method of SOI (silicon on insulator)-based SiGe-HBT (heterojunction bipolar transistor)

A transistor and base technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem of lowering the maximum cut-off frequency Ft parameter, small vertical width of the collector region, and increased collector resistance of SiGe-HBT devices, etc. problem, to achieve the effect of easy implementation, avoiding the increase of doping concentration, and simple preparation process

Inactive Publication Date: 2014-09-10
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Application Information

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Problems solved by technology

But for the thin-film SOI process, because the top silicon film is very thin (less than 0.15um), the vertical width of the collector region is small, and the extra base region formed by the downward extension of the external base implant will lead to a substantial increase in the collector resistance of the SiGe-HBT device. and the highest cut-off frequency Ft parameter is significantly reduced

Method used

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  • Preparation method of SOI (silicon on insulator)-based SiGe-HBT (heterojunction bipolar transistor)
  • Preparation method of SOI (silicon on insulator)-based SiGe-HBT (heterojunction bipolar transistor)
  • Preparation method of SOI (silicon on insulator)-based SiGe-HBT (heterojunction bipolar transistor)

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Embodiment

[0051] control attached Figure 1a to Figure 1m , the present invention provides a method for preparing an SOI-based vertical SiGe-HBT, comprising the following steps:

[0052] Step 1: If Figure 1a to Figure 1b As shown, an SOI substrate 11 is provided, including a back substrate silicon 110, a buried layer silicon oxide 111 and a top layer silicon 112, wherein the SOI substrate 11 is a conventional SOI starting wafer, and the thickness of the buried layer silicon oxide 111 is 100nm-200nm, the thickness of the top layer silicon 112 is 50nm-150nm. In this embodiment, the thickness of the buried layer silicon oxide 111 is temporarily selected as 150 nm, and the thickness of the top layer silicon 112 is temporarily selected as 100 nm, but it is not limited thereto. In other embodiments, other thicknesses can also be used, such as the buried layer The thickness of the silicon oxide 111 may be 100nm, 120nm, 180nm, or 200nm, etc., and the thickness of the top layer silicon 112 ma...

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Abstract

A method of manufacturing an SOI-based SiGe-HBT transistor. A specific photomask (24) is added in a doping and injection process for an outer base region (181). The photomask has the same pattern as that of the mask (16) used in forming a base region window, so as to define the injection of the outer base region within a specified region, thereby solving the problems of increased collector resistance and a reduced maximum cut-off frequency Ft parameter for SiGe BJT devices on a thin-film SOI, and also avoiding the problem of lowered voltage endurance of devices because of an increased doping concentration in a collector region.

Description

technical field [0001] The invention belongs to the field of solid electronics and microelectronics, and relates to a method for preparing a SiGe bipolar transistor, in particular to a method for preparing an SOI-based SiGe bipolar transistor (SiGe-HBT). Background technique [0002] Due to the demand for high-performance, low-noise and low-cost RF components in high-frequency bands for modern communications, traditional Si material devices cannot meet new requirements such as performance specifications and output power. The silicon-germanium heterojunction bipolar transistor (SiGe-HBT) formed by introducing Ge into the Si material as the base of the bipolar transistor is favored by the market due to its low cost and high performance potential. Under the same conditions, SiGe devices have higher frequency, faster speed, lower noise, and higher current gain than Si devices, and are suitable for high-frequency applications. The SiGeHBT process is a silicon-based technology, a...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/331H01L21/266H01L29/737
CPCH01L29/7378H01L29/66242
Inventor 柴展陈静罗杰馨伍青青王曦
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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