Method for improving performance of device of SONOS (silicon-oxide-nitride-oxide-silicon) structure

A device and performance technology, applied in the field of SONOS structure, can solve the problems of slowing down of erasing speed and inability to continue erasing, and achieve the effect of eliminating influence, uniform distribution and cost saving

Inactive Publication Date: 2012-12-19
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Application Information

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Problems solved by technology

When the two tunneling speeds are equal, the loss and injection of electrons in the charge storage silicon nitride layer reac...

Method used

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  • Method for improving performance of device of SONOS (silicon-oxide-nitride-oxide-silicon) structure
  • Method for improving performance of device of SONOS (silicon-oxide-nitride-oxide-silicon) structure

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Embodiment Construction

[0020] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0021] like figure 2 Shown is a SONOS structure device made according to a method of improving the performance of a SONOS structure device of the present invention, the SONOS structure includes a substrate 21, a tunnel dielectric layer 22, a charge storage layer 23, a blocking dielectric layer 24 and a conductive layer 25, The substrate includes a source 26 and a drain 27, and the tunnel dielectric layer, charge storage layer, blocking dielectric layer and conductive layer are arranged on the substrate in sequence from bottom to top; wherein the substrate is made of silicon material, and the tunnel The through dielectric layer and the blocking dielectric layer are made of silicon oxide material, the charge storage layer is made of silicon nitride material, and the conductive layer is a polysi...

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Abstract

The invention discloses a method for improving performance of a device of an SONOS (silicon-oxide-nitride-oxide-silicon) structure. The SONOS structure comprises a substrate, a tunneling dielectric layer, a charge storage layer, a barrier dielectric layer and a conducting layer, wherein the substrate comprises a source and a drain inside, and the tunneling dielectric layer, the charge storage layer, the barrier dielectric layer and the conducting layer are arranged on the substrate from bottom to top in sequence, wherein a concave SONOS structure design is adopted and a graded silicon nitride layer is used for forming the charge storage layer. The method has the following beneficial effects: the formation of the concave SONOS structure facilitates the difference of distribution of the electric field strength in different layers, so that the compiling and erasing speeds can be increased, and the impact of the erasing saturation on the erasing speed can be inhibited; due to relatively low difference between the Young's moduli of the graded silicon nitride layer and the tunneling silicon oxide layer, the impact of stress caused by relatively high difference between the Young's moduli of the tunneling silicon oxide layer and the silicon nitride on the device can be reduced; and the trapped electrons can be redistributed by the gradual silicon nitride layer, so that the storage charges can be distributed in the charge storage layer more uniformly.

Description

technical field [0001] The invention relates to the technical field of SONOS structure, in particular to a method for improving the performance of SONOS structure devices. Background technique [0002] Flash memory is a kind of non-volatile memory device. Traditional flash memory uses floating gates to store data. Since polysilicon is a conductor, the charges stored in floating gates are continuously distributed. When there is a leakage channel, the charge stored on the entire floating gate is lost through this leakage channel. Therefore, the biggest obstacle limiting the ability of flash memory to scale down is that its tunnel oxide thickness cannot be continuously reduced. Because in the case of a thin tunnel oxide layer, effects such as direct tunneling and stress-induced leakage current will pose a huge challenge to the leakage control of the memory. With the widespread application of flash memory, the newly developed SONOS structure (Sillicon-Oxide-Nitride-Oxide-Silli...

Claims

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Application Information

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IPC IPC(8): H01L21/8247
Inventor 田志顾经纶
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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