Liquid crystal display timing driver

Abstract

The invention provides a liquid crystal display timing driver. The liquid crystal display timing driver comprises a master timing control chip, a slave timing control chip, a display drive interface, a backlight drive interface, a first memory, a second memory and a data input interface, wherein the display drive interface is electrically connected with a liquid crystal panel; the backlight drive interface is electrically connected with the backlight drive circuit; the master timing control chip and the slave timing control chip are used for receiving a control signal from the data input interface and outputting a display timing control signal and a display data signal to the liquid crystal panel from the display drive interface according to the control signal; and the slave timing control chip is used for outputting a pulse width modulation signal to the backlight drive circuit from the backlight drive interface. According to the liquid crystal display timing driver disclosed by the invention, the liquid crystal panel and the backlight source are driven by adopting two timing control chips, so that a control chip required to be increased when backlight scanning is carried out in the prior art can be omitted, further the cost is reduced and the product market competitiveness is improved.

Description

technical field [0001] The invention relates to the field of liquid crystal display driving, in particular to a timing driver for large-size liquid crystal display. Background technique [0002] The driving circuit of the liquid crystal display includes: a timing control circuit, a source driving circuit, a gate driving circuit and a backlight driving circuit. [0003] Timing control is an important and indispensable part of liquid crystal display. It mainly includes timing control circuit. Its main function is to receive the main board circuit signal, output gate driver timing signal, source driver timing signal and data signal, field synchronization signal and other functions. Signal. The timing signals corresponding to the gate drive include: clock signal (CKV), start pulse signal (STV, used as a field synchronization signal), output enable signal (OE, controlling the gate switch); the timing signals corresponding to the source drive include : Latch pulse signal (TP), p...

AI Technical Summary

Problems solved by technology

[0006] The current tablet computers and LCD monitors are adjusted by independent backlight adjustment methods, and the timing control circuit of the LCD display and the timing control circuit of the backlight are independent of each other. Two chips are used to independently control the two gate drivers and the source Pole drive timing, an additional central control processing module (MCU) is added to control the backlight drive timing, so that the refresh frequency of the LCD screen cannot be guaranteed to be consistent with the PWM frequency and phase of the backlight control circuit, which may cause screen flickering

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