Transistor and forming method thereof

Abstract

The invention discloses a transistor and a forming method thereof. The forming method includes: providing a substrate; embedding dielectric strips parallel into the surface of the substrate in the substrate; and forming doped regions on the dielectric strips. The transistor comprises the substrate, a gate structure, the doped regions and the dielectric strips, wherein the gate structure is positioned on the substrate, the doped regions are formed in the substrate and positioned on two sides of the gate structure, and the dielectric strips are positioned at positions of interfaces of the doped regions and the substrate and are parallel to the surface of the substrate. By the transistor and the method, junction capacitance among the doped regions and the substrate can be reduced, and performance of the transistor is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and more specifically, the present invention relates to a transistor and a forming method thereof. Background technique [0002] Metal-oxide-semiconductor (MOS) transistors are the most basic devices in semiconductor manufacturing. They are widely used in various integrated circuits. According to the main carrier and the type of doping during manufacturing, they are divided into NMOS and PMOS transistors. [0003] The prior art provides a method for forming a transistor. Please refer to Figure 1 to Figure 3 , is a schematic cross-sectional structure diagram of a method for forming a transistor in the prior art. [0004] Please refer to figure 1 , provide a substrate 01, perform ion implantation on the substrate 01, and perform heat treatment on it to form a well region 001; perform ion implantation on the substrate 01 to form an ion region 002, and the ion region 002 is located...

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Problems solved by technology

[0008] In practice, it is found that the junction capacitance and junction current between the source / drain region and the substrate of the transistor formed by the existing method are relatively high, and the performance of the transistor is not ideal

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