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Electrical connector between die pad and z-interconnect for stacked die assemblies

A technology of chip pads and contact points, applied in circuits, electrical components, semiconductor devices, etc., can solve problems such as inability to interconnect

Inactive Publication Date: 2013-03-06
INVENSAS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When chips are stacked, especially when chips of the same or similar size are stacked on top of each other, one chip in the stack may obscure the pads on another chip so that they cannot be interconnected

Method used

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  • Electrical connector between die pad and z-interconnect for stacked die assemblies
  • Electrical connector between die pad and z-interconnect for stacked die assemblies
  • Electrical connector between die pad and z-interconnect for stacked die assemblies

Examples

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Embodiment Construction

[0056] The invention will now be described in further detail with reference to the accompanying drawings, which show alternative embodiments of the invention. The drawings are schematic, illustrating features of the invention and their relationship to other features and structures, and are not drawn to scale. For clarity of presentation, in the drawings illustrating embodiments of the invention, elements corresponding to elements shown in other drawings are not specifically renumbered, although they are easily identifiable in all of the drawings . Furthermore, for clarity of presentation, certain features not necessary for an understanding of the invention have not been shown in the drawings.

[0057] Figure 1A An example of a stacked chip assembly is shown in which adjacent offset chips in the stack are mounted on top of each other so that the respective interconnect edges are vertically aligned, for example as described in above-referenced US Patent Application 12 / 124,077....

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PUM

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Abstract

Methods for forming connectors on die pads at a wafer level of processing include forming spots of a curable electrically conductive material over die pads and extending to or over the interconnect die edge; curing the conductive material; and in a wafer cutting procedure thereafter severing the spots. Also, die pad to z-interconnect connectors formed by the methods, and shaped and dimensioned accordingly. Also, stacked die assemblies and stacked die packages containing die prepared according to the methods and having die pad to z-interconnect connectors formed by the methods and shaped and dimensioned accordingly.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to U.S. Provisional Patent Application 61 / 395,987, entitled "Electrical connector between die pad and Z-interconnect for stacked die assemblies," filed May 19, 2010 by R. Co. et al., which is incorporated by reference here. [0003] This application is related to the following applications: U.S. Patent Application 12 / 323,288, filed November 25, 2008, by R.Co et al., entitled "Semiconductor die separation method"; S.J.S McElrea et al., filed May 20, 2008 , U.S. Patent Application No. 12 / 124,077, the invention name is "Electrically interconnected stacked dieassemblies" application; S.J.S McElrea et al. submitted on June 19, 2008, U.S. Patent Application No. 12 / 142,589, the invention name is "Wafer level surface passivation of stackable integrated circuit chips" application; T.Caskey et al. submitted on May 20, 2008, US patent application 12 / 124,097, the application titled "Electrical interco...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/12H01L23/48
CPCH01L2224/0332H01L2224/32225H01L25/0657H01L2225/06551H01L24/24H01L2924/01327H01L24/05H01L2221/68336H01L2224/24145H01L2224/05016H01L23/3171H01L23/3185H01L2224/03632H01L2224/24051H01L2224/03848H01L23/3192H01L2924/14H01L2224/03318H01L2224/73267H01L2224/0529H01L2225/06568H01L2224/32145H01L2225/06562H01L2221/68327H01L24/03H01L24/82H01L2224/82102H01L25/50H01L21/6836H01L24/18H01L2224/05017H01L2224/76155H01L2224/05553H01L2224/94H01L2224/03002H01L2224/0235H01L2224/02371H01L21/78H01L2924/00H01L2224/03H01L23/12H01L23/48H01L25/043
Inventor 雷纳多·科杰弗里·S·莱亚尔苏塞特·K·潘格尔斯科特·马克格瑞斯迪安·艾琳·美尔希基思·L·巴里格兰特·维拉维森西奥埃尔默·M·德尔罗萨利奥约翰·R·布雷
Owner INVENSAS CORP