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K nearest neighbor classifier based on field programmable gate array (FPGA)

A K-nearest neighbor and classifier technology, applied in the directions of instruments, processor architecture/configuration, character and pattern recognition, etc., can solve the problems of slow calculation speed, large amount of calculation, difficult to achieve real-time processing, etc., to achieve the effect of speeding up

Active Publication Date: 2015-07-15
XIDIAN UNIV
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  • Application Information

AI Technical Summary

Problems solved by technology

[0007] When using DSP to implement the K-nearest neighbor classifier, the calculation of the distance between the sample to be tested and all the training samples in the feature space and the sorting of the distances are all floating-point operations, and the amount of calculation is large, and the floating-point operations of the fixed-point DSP are simulated by software, Realized by serial execution, in the case of video target detection with high speed requirements and a large amount of data, the calculation speed is slow, and it is difficult to meet the requirements of real-time processing

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  • K nearest neighbor classifier based on field programmable gate array (FPGA)
  • K nearest neighbor classifier based on field programmable gate array (FPGA)
  • K nearest neighbor classifier based on field programmable gate array (FPGA)

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Embodiment Construction

[0035] refer to figure 1, the present invention includes: N+1 read-only storage units 1, serial-in-parallel-out unit 2, distance calculation unit 3, tag delay unit 4, K-nearest neighbor selection unit 5 and decision unit 6. in:

[0036] The N+1 read-only memory units 1, the first N read-only memory units ROM(1), ROM(2), ... ROM(N) are respectively used to store N-dimensional feature data of training samples, N=7; Its last read-only memory unit ROM (N+1) is used for storing the category label of training sample;

[0037] The serial-in parallel-out unit 2 is provided with an input port and N output ports, and its input port is used as the input port of the entire K-nearest neighbor classifier for serially inputting N feature data of samples to be tested Convert to parallel N-dimensional feature data. The structure of the serial-in-parallel-out unit is as follows figure 2 shown.

[0038] The distance calculation unit 3 is provided with N pairs of input ports and 1 output po...

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Abstract

The invention discloses a K nearest neighbor classifier based on a field programmable gate array (FPGA), which mainly solves the problem that the classification speed is low in the prior art. The K nearest neighbor classifier comprises a read only memory unit, a serial-in parallel-out unit, a distance calculation unit, a label delay unit, a K nearest neighbor selection unit and a judgment unit, wherein the serial-in parallel-out unit outputs the serial input characteristic data of a sample to be detected to the distance calculation unit in parallel; meanwhile, the read only memory unit outputs the characteristic data of a training sample to the distance calculation unit and obtains a norm distance between the characteristics of the sample to be detected and the characteristics of the training sample through the distance calculation unit; the training sample label is delayed by the label delay unit and is synchronously output to the K nearest neighbor selection unit together with the result of the distance calculation unit; the K nearest neighbor selection unit outputs K nearest labels; and the judgment unit judges the type of the sample to be detected according to the K nearest labels. The K nearest neighbor classifier has the advantages of high classification speed, simple structure and high reconfigurability and can be used for real-time video target identification.

Description

technical field [0001] The invention belongs to the field of video target detection, in particular to an FPGA-based K-nearest neighbor classifier, which can be applied to real-time video target detection. Background technique [0002] Video target detection is to extract key frames through the video acquisition system at the front end, and then transmit them to the back end through some image processing techniques to achieve the purpose of automatic target identification. The most important thing in video target detection is to achieve real-time target detection, and at the same time achieve a high recognition rate. [0003] At present, video target detection is mainly realized by computer or digital signal processor DSP. It is relatively easy to achieve a high recognition rate on a general-purpose computer, and a high recognition rate can be achieved through complex algorithms, but a general-purpose computer does not have portability. And flexibility, so using a general-pu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/20G06K9/62
Inventor 侯彪侯小瑾周宇焦李成王爽张向荣马文萍马晶晶
Owner XIDIAN UNIV