[0029] In order to make the technical content disclosed in this application more detailed and complete, reference may be made to the accompanying drawings and the following various specific embodiments of the present invention. The same signs in the accompanying drawings represent the same or similar components. However, those of ordinary skill in the art should understand that the embodiments provided below are not intended to limit the scope of the present invention. In addition, the drawings are only for illustrative purposes, and are not drawn according to their original dimensions.
[0030] The specific implementation manners of each aspect of the present invention will be further described in detail below with reference to the accompanying drawings.
[0031] figure 1 It shows a schematic diagram of the principle of a pixel compensation circuit in the prior art adopting the "2T1C" architecture. Reference figure 1 The pixel compensation circuit has a "2T1C" structure, where 2T is the thin film transistor T11 and the thin film transistor T12, and 1C is the storage capacitor C1 connected between the gate and the source of the thin film transistor T12. That is, the term "mTnC" indicates that the number of thin film transistors is m and the number of storage capacitors is n, and both m and n are natural numbers.
[0032] Wherein, the gate of the thin film transistor T11 is electrically connected to a scan signal Scan, the source is used to receive a data voltage signal, and the drain is connected to the gate of the thin film transistor T12. The source of the thin film transistor T12 is electrically connected to a common voltage OVDD, and the drain is connected to a ground voltage OVSS via the organic light emitting diode OLED. When driving to emit light, current will flow through the OVDD. Since the OVDD on the panel is connected to each pixel and the OVDD metal transmission line itself has impedance, the OVDD will be different for different pixels. As mentioned above, due to the current difference between different pixels, even if the same data voltage signal is received, the current flowing through the OLED will be different, thereby causing uneven display of the panel.
[0033] figure 2 It shows a schematic structural diagram of a pixel compensation circuit according to an embodiment of the present invention. image 3 show figure 2 Schematic diagram of the timing of the key signals of the pixel compensation circuit in.
[0034] Reference figure 2 , The pixel compensation circuit of the present invention includes a first switch T1, a second switch T2, a third switch T3, a fourth switch T4, a fifth switch T5, capacitors C1 and C2, and an organic light emitting diode OLED. That is, the pixel compensation circuit adopts the "5T2C" architecture. For example, the switches T1 to T5 may be thin film transistors.
[0035] Take the switches T1~T5 as thin film transistors as an example. figure 2 Wherein, the first terminal (such as the source) of the first switch T1 is electrically connected to a data signal Data, and the gate of the first switch T1 is electrically connected to a first control signal S1. The first terminal (such as the source) of the second switch T2 is electrically connected to a first voltage OVDD, the gate of the second switch T2 is electrically connected to a second control signal S2, and the second terminal of the second switch T2 ( A second capacitor C2 is included between the drain and the first terminal (the source). The source of the third switch T3 is electrically connected to the drain of the second switch T2, the gate of the third switch T3 is electrically connected to the drain of the first switch T1, between the gate and the source of the third switch T3 Includes a first capacitor C1. That is, the first capacitor C1 is located between the node G and the node S.
[0036] The source of the fourth switch T4 is electrically connected to the drain of the first switch T1 and the gate of the third switch T3, the drain of the fourth switch T4 is electrically connected to the drain of the third switch T3, and the fourth switch T4 The gate of is electrically connected to a third control signal S3. The gate of the fifth switch T5 is electrically connected to a fourth control signal S4, and the source of the fifth switch T5 is electrically connected to the drain of the third switch T3 and the drain of the fourth switch T4. The anode of the organic light emitting diode OLED is electrically connected to the drain of the fifth switch T5, and the cathode thereof is electrically connected to a second voltage OVSS. In addition, it should be pointed out that in figure 2 Among them, the thin film transistors T1~T5 are all turned on at a low level, that is, when the control signal received by the gate of the thin film transistor is high, the thin film transistor is turned off; when the control signal received by the gate of the thin film transistor is When the signal is low, the thin film transistor is turned on. However, the present invention is not limited to this. For example, in other embodiments, the thin film transistors T1 to T5 may also be turned on at a high level.
[0037] Reference image 3 The pixel compensation circuit sequentially includes a reset period (Reset) Tr, a voltage storage period (Vth Storing) Ts, a data writing period (Data Writing) Td, and an emission period (Emission) Te. More specifically, during the reset period Tr and the voltage storage period Ts, the data signal is loaded with a reference voltage Vref, and the reset operation and the voltage storage operation of the pixel compensation circuit are performed by the reference voltage. During the data writing period, the data signal is switched from the reference voltage Vref to the data voltage Vdata, and the pixel compensation circuit writes the data voltage Vdata. In the light-emitting period, the fourth control signal S4 is at a low level, the thin film transistor T5 is turned on, and the organic light-emitting diode OLED has a current flowing through it, so the organic light-emitting diode emits light. Below, will be combined separately Figure 4~Figure 7 Describe in detail the working principles of the above periods.
[0038] Figure 4 show figure 2 Schematic diagram of states of the first switch to the fifth switch of the pixel compensation circuit in the reset period.
[0039] Combine Figure 4 with image 3 In the reset period Tr, the first control signal S1 is a low level, the second control signal S2 is a low level, the third control signal S3 is a high level, and the fourth control signal S4 is a high level . Correspondingly, the first switch T1 and the second switch T2 are in an on state, and the fourth switch T4 and the fifth switch T5 are in an off state.
[0040] Since the first switch T1 is turned on, the reference voltage Vref received by the source of the first switch T1 is transferred to the gate of the third switch T3, that is, the potential of the node G is equal to the reference voltage Vref. Similarly, since the second switch T2 is turned on, the potential OVDD of the source of the second switch T2 is transferred to the drain of the second switch T2, that is, the potential of the node S is equal to OVDD.
[0041] Figure 5 show figure 2 Schematic diagram of states of the first switch to the fifth switch of the pixel compensation circuit in the voltage storage period.
[0042] Combine Figure 5 with image 3 In the voltage storage period Ts, the first control signal S1 is at a low level, the second control signal S2 is at a high level, the third control signal S3 is at a low level, and the fourth control signal S4 is at a high level. level. Correspondingly, the first switch T1 and the fourth switch T4 are in an on state, and the second switch T2 and the fifth switch T5 are in an off state. Since the first switch T1 is still turned on, the potential of the node G is equal to the reference voltage Vref. Since the second switch T2 is turned off, the potential of the node S is equal to the difference between the reference voltage Vref and a threshold voltage Vth. For example, the voltage Vth is the threshold voltage of the thin film transistor.
[0043] Image 6 show figure 2 The state diagram of the first switch to the fifth switch of the pixel compensation circuit in the data writing period.
[0044] Combine Image 6 with image 3 In the data writing period Td, the first control signal S1 is at a low level, the second control signal S2 is at a high level, the third control signal S3 is at a high level, and the fourth control signal S4 is at a high level. Level. Correspondingly, the first switch T1 is in the on state, and the second switch T2, the fourth switch T4, and the fifth switch T5 are all in the off state. At this time, since the first switch T1 is still turned on, the voltage of the node G is the data voltage Vdata. Considering the charging and discharging operations of capacitor C1 and capacitor C2, the voltage of node S is equal to (Vref-Vth+dV), where dV satisfies the following relationship:
[0045] dV = C 1 C 1 + C 2 X ( Vdata - Vref )
[0046] Figure 7 show figure 2 Schematic diagram of the states of the first switch to the fifth switch of the pixel compensation circuit in the light-emitting period.
[0047] Combine Figure 7 with image 3 During the light-emitting period Te, the first control signal S1 is at a high level, the second control signal S2 is at a low level, the third control signal S3 is at a high level, and the fourth control signal S4 is at a low level . Correspondingly, the first switch T1 and the fourth switch T4 are in the off state, and the second switch T2 and the fifth switch T5 are in the off state. It can be seen that the fifth switch is only turned on during the light-emitting period Te, and the organic light-emitting diode OLED also emits light only during the light-emitting period Ts, thus prolonging the service life of the OLED.
[0048] At this time, since the first switch T1 is turned off, the voltage of the node G is no longer Vdata, but is changed to (Vdata+OVDD-Vref+Vth-dV). In addition, since the second switch T2 is turned on, the potential of the node S is equal to OVDD again.
[0049] The following uses different data voltages to compare the current error between the pixel compensation circuit of the traditional 2T1C architecture and the pixel compensation circuit of the 5T2C architecture of the present invention. Among them, Table 1 is a table of error values when the switching threshold of the pixel compensation circuit of the present invention changes under different data voltages, and Table 2 is a table of error values when the switching threshold of a conventional pixel compensation circuit changes under different data voltages.
[0050] Table 1
[0051]
[0052] Table 2
[0053]
[0054] Comparing Table 1 and Table 2, as the data voltage increases, the current flowing through the thin film transistor gradually decreases. In addition, in the pixel compensation circuit of the 5T2C architecture of the present invention, since the current is only related to the data voltage Vdata and the reference voltage Vref, the error when the threshold voltage Vth changes is small. In contrast, the pixel compensation of the traditional 2T1C architecture The circuit is greatly affected by the error of the threshold voltage Vth change.
[0055] Using the pixel compensation circuit of the present invention, a 5T2C structure is formed by the first switch to the fifth switch, two capacitors, and an OLED, so that the operating sequence of the pixel compensation circuit is divided into a reset period, a voltage storage period, and a data writing period. During and during the light-emitting period, since the fifth switch is in the off state during the reset period, the voltage storage period and the data writing period, the OLED does not emit light, which prolongs the service life of the OLED. In addition, the fifth switch is in the on state during the light-emitting period, and the current flowing through the OLED is only related to the reference voltage and the data voltage, which can overcome the influence of process differences and current drop to achieve pixel compensation and panel brightness uniformity.
[0056] In the foregoing, specific embodiments of the present invention have been described with reference to the drawings. However, those of ordinary skill in the art can understand that various changes and substitutions can be made to the specific embodiments of the present invention without departing from the spirit and scope of the present invention. These changes and replacements fall within the scope defined by the claims of the present invention.
