Vertical parasitic type precision navigation processor (PNP) device and manufacturing method thereof in bipolar complementary metal-oxide-semiconductor transistor (BiCMOS) technology

Abstract

The invention discloses a vertical parasitic type precision navigation processor (PNP) device in bipolar complementary metal-oxide-semiconductor transistor (BiCMOS) technology. The vertical parasitic type PNP device in the BiCMOS technology comprises a collector region, a base region, an emitter region and an artifact buried layer. The artifact buried layer is formed on the bottom of shallow groove field oxide on two sides of the collector region, expands horizontally into an active region and contacts with the collector region. A collector is led out by contacting with a deep hole which is formed in the shallow groove field oxide on the top of the artifact buried layer. The emitter region is constituted of P type polycrystalline silicon which is formed on the upper portion of the base region, and the emitter region is placed on one side which deviates from the active region. Metallic contact in the base region is placed on the other side of the active region. The invention further discloses a manufacturing method of the vertical parasitic type PNP device in the BiCMOS technology. The vertical parasitic type PNP device in the BiCMOS technology can be used as an output device in a high speed and high gain (HG) BiCMOS circuit, and thus one more device option is supplied to circuits, the area of the device can be effectively reduced, the collector resistance of a PNP tube is decreased, and the performance of the device is improved. By means of the manufacturing method of the vertical parasitic type PNP device in the BiCMOS technology, extra technological conditions are of no need, and production cost can be lowered.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a vertical parasitic PNP device in a BiCMOS process, and also relates to a method for manufacturing the vertical parasitic PNP device in the BiCMOS process. Background technique [0002] In RF applications, higher and higher device characteristic frequencies are required. In the BiCMOS process technology, NPN transistors, especially silicon-germanium heterojunction transistors (SiGe) or silicon-germanium carbon heterojunction transistors (SiGeC HBT) are good choices for UHF devices. And the SiGe process is basically compatible with the silicon process, so SiGe HBT has become one of the mainstreams of UHF devices. In this context, the requirements for the output device are correspondingly increased, such as having a certain current gain coefficient (not less than 15) and cut-off frequency. [0003] In the prior art, the output device can adopt a vert...

AI Technical Summary

Problems solved by technology

The disadvantage is that the device area is large and the connection resistance of the collector is large

Since the extraction of the collector electrode in the prior art is realized through another active re

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