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Method for manufacturing passivation layer on pixel electrode, liquid crystal display and manufacturing method thereof

A technology of liquid crystal display and manufacturing method, which is applied to instruments, circuits, electrical components, etc., can solve problems such as inability to display and abnormal display of TFT products, and achieve the effects of improving yield, ensuring good electrical contact, and reducing losses

Inactive Publication Date: 2013-05-22
TRULY SEMICON
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Problems solved by technology

[0004] In order to solve the above-mentioned technical problems, an embodiment of the present invention provides a method for manufacturing a passivation layer on a liquid crystal display and its pixel electrode, so as to solve the problem of abnormal display or Problems that cannot be displayed, improve the yield of TFT products

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  • Method for manufacturing passivation layer on pixel electrode, liquid crystal display and manufacturing method thereof
  • Method for manufacturing passivation layer on pixel electrode, liquid crystal display and manufacturing method thereof
  • Method for manufacturing passivation layer on pixel electrode, liquid crystal display and manufacturing method thereof

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Embodiment 1

[0038] Such as Figure 4 As shown, the method for manufacturing the passivation layer on the pixel electrode provided by the embodiment of the present invention includes: forming a passivation layer 12 with a first thickness on the surface of the pixel electrode 11 under the first power and using the process gas of the first flow rate ; Under the second power, the process gas of the second flow rate is used to form the passivation layer 13 of the second thickness on the surface of the passivation layer 12 of the first thickness; wherein, the first power is less than the second power; The first flow rate is smaller than the second flow rate; the first thickness is smaller than the second thickness.

[0039] In one embodiment of the present invention, the passivation layer is a silicon nitride layer, and the process gas in its fabrication process includes SiH 4and NH 3 . In the following embodiments of the present invention, the passivation layer is a silicon nitride layer as...

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Abstract

An embodiment of the invention discloses a method for manufacturing passivation layer on a pixel electrode, a liquid crystal display and a manufacturing method thereof. The method for manufacturing a passivation layer on the pixel electrode includes: forming a passivation layer in a first thickness on the surface of a pixel electrode via process gas in a first flow volume under first power; forming a passivation layer in a second thickness on the surface of passivation layer in the first thickness via process gas in a second flow volume under second power, wherein the first power is smaller than the second power, the first flow volume is smaller than the second flow volume, the first thickness is smaller than the second thickness, the passivation layer in the first thickness and the passivation layer in the second thickness are compact, so that when through holes are drilled in the passivation layers, undercut is avoided, good electric connection between a top electrode and a pixel electrode is guaranteed, the problem that a TFT (thin film transistor) product displays abnormally or cannot display due to contact breakage between the top layer ITO (indium tin oxide) film and the pixel ITO film is solved, product rate of the TFT products is improved.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display manufacturing, in particular to a method for manufacturing a passivation layer on a pixel electrode, a liquid crystal display and a manufacturing method thereof. Background technique [0002] Such as Figure 1-Figure 3 As shown, in the production process of TFT products, after the pixel ITO film 01 is completed, it is necessary to use chemical vapor deposition equipment to form a passivation layer 02 on the surface of the pixel ITO film 01; Form a via hole 03 in the passivation layer 02; finally form a top layer ITO04 on the surface of the passivation layer 02; wherein, the top layer ITO04 is electrically connected to the pixel ITO film 01. [0003] However, in the manufacturing process of traditional TFT products, during the process of forming the via hole 03, an undercut, also known as an inverse angle or a chamfer, will be formed at the via hole 03 in the passivation layer 02, re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77H01L21/31G02F1/136
Inventor 阮文中陈建荣任思雨于春崎胡君文何基强
Owner TRULY SEMICON
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