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A kind of eeprom storage array structure and its manufacturing method

A storage array, column-oriented technology, applied in information storage, static memory, read-only memory, etc., can solve the problems of reduced read operation current, inaccurate read operation, large voltage drop, etc.

Active Publication Date: 2017-08-25
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, when there is more data to be erased and written at one time or the load current is large, more memory cells are selected, and when the current in each selected memory cell is output through this metal layer at the same time, a large voltage drop will occur, resulting in a read operation. The current is reduced, which affects the speed of the read operation, and even causes the read operation to be inaccurate

Method used

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  • A kind of eeprom storage array structure and its manufacturing method
  • A kind of eeprom storage array structure and its manufacturing method
  • A kind of eeprom storage array structure and its manufacturing method

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Embodiment Construction

[0031] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0032] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0033] see figure 2 , the structure of an EEPROM storage array provided by the present invention is described in detail. The EEPROM storage array structure receives a power supply signal (VCC) (not shown), the voltage range of the power supply signal (VCC) is 1-5V, and the EEPROM ...

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Abstract

The invention provides an electrically erasable programmable read-only memory (EEPROM) storage array structure. The structure comprises a plurality of memory cells, drain electrode selection wires and source electrode selection wires, word line strobe signal wires and control gate wires, wherein each memory cell comprises an N trap, a drain electrode, a source electrode, a drain electrode floating gate, a drain electrode control gate, a source electrode floating gate, a source electrode control gate and a selection gate, and the bottom part of each N trap is connected with a trap end; the drain electrode selection wires and the source electrode selection wires are alternately arrayed along an array direction, each drain electrode selection wire and each source electrode selection wire are respectively connected with the drain electrode and the source electrode of each memory cell on the array direction, and the drain electrode selection wires and the source electrode selection wires are respectively connected up to drain signals and source signals; the word line strobe signal wires are arrayed along a line direction, and each word line strobe signal wire is connected with the selection gate of each memory cell along the line direction and receives word line strobe signals; and the control gate wires are arrayed along the line direction, each control gate wire is connected with the drain electrode control gate and the source electrode control gate in each memory cell along the line direction and receives control gate signals, so that an array structure cannot be damaged by continuous repeated programming and erasing operations under the condition of lower various signals.

Description

technical field [0001] The invention belongs to semiconductor integrated circuit devices, in particular to an EEPROM storage array structure and a manufacturing method thereof. Background technique [0002] Electrically Erasable Programmable Nonvolatile Memory (EEPROM) is a type of nonvolatile memory that is often used in integrated circuits and has the advantage of being able to retain data even when power is turned off. [0003] Such as figure 1 , the existing EEPROM uses polysilicon floating gates to store charges, 1 is the substrate, 2 is the tunnel oxide layer, 3 is the floating gate, 4 is the drain, 4' is the source, 5 is the interlayer insulating layer, and 6 is the control Gate, 7 is the field oxygen region between the left and right transistors. The structure of the EEPROM is such that the floating gate 3 on which charges are accumulated is disposed between the control gate 6 and the tunnel oxide layer 2 . If a high voltage is applied in the positive direction be...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11521G11C16/04
Inventor 胡剑杨光军
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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