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Electrically erasable programmable read-only memory (EEPROM) storage array structure and method for producing same

A memory array and column-oriented technology, applied in information storage, static memory, read-only memory, etc., can solve problems such as large voltage drop, reduced read operation current, and affected read operation speed

Active Publication Date: 2013-06-12
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, when there is more data to be erased and written at one time or the load current is large, more memory cells are selected, and when the current in each selected memory cell is output through this metal layer at the same time, a large voltage drop will occur, resulting in a read operation. The current is reduced, which affects the speed of the read operation, and even causes the read operation to be inaccurate

Method used

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  • Electrically erasable programmable read-only memory (EEPROM) storage array structure and method for producing same
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  • Electrically erasable programmable read-only memory (EEPROM) storage array structure and method for producing same

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Embodiment Construction

[0031] In order to make the above objectives, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0032] In the following description, many specific details are explained in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar popularizations without violating the connotation of the present invention. Therefore, the present invention is not limited by the specific implementation disclosed below.

[0033] See figure 2 , A detailed description of the EEPROM storage array structure provided by the present invention. The EEPROM storage array structure receives a power supply signal (VCC) (not shown), the voltage range of the power supply signal (VCC) is 1 to 5V, and the EEPROM stor...

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Abstract

The invention provides an electrically erasable programmable read-only memory (EEPROM) storage array structure. The structure comprises a plurality of memory cells, drain electrode selection wires and source electrode selection wires, word line strobe signal wires and control gate wires, wherein each memory cell comprises an N trap, a drain electrode, a source electrode, a drain electrode floating gate, a drain electrode control gate, a source electrode floating gate, a source electrode control gate and a selection gate, and the bottom part of each N trap is connected with a trap end; the drain electrode selection wires and the source electrode selection wires are alternately arrayed along an array direction, each drain electrode selection wire and each source electrode selection wire are respectively connected with the drain electrode and the source electrode of each memory cell on the array direction, and the drain electrode selection wires and the source electrode selection wires are respectively connected up to drain signals and source signals; the word line strobe signal wires are arrayed along a line direction, and each word line strobe signal wire is connected with the selection gate of each memory cell along the line direction and receives word line strobe signals; and the control gate wires are arrayed along the line direction, each control gate wire is connected with the drain electrode control gate and the source electrode control gate in each memory cell along the line direction and receives control gate signals, so that an array structure cannot be damaged by continuous repeated programming and erasing operations under the condition of lower various signals.

Description

Technical field [0001] The invention belongs to a semiconductor integrated circuit device, and in particular relates to an EEPROM storage array structure and a manufacturing method thereof. Background technique [0002] Electrically erasable programmable non-volatile memory (EEPROM) is a type of non-volatile memory, which is often used in integrated circuits. Its advantage is that it can save data even when the power supply is stopped. [0003] Such as figure 1 , The existing EEPROM uses polysilicon floating gate to store charge, 1 is the substrate, 2 is the tunnel oxide layer, 3 is the floating gate, 4 is the drain, 4'is the source, 5 is the interlayer insulating layer, and 6 is the control The gate, 7 is the field oxygen region between the left and right transistors. The structure of the EEPROM is to arrange the floating gate 3 on which the charge is accumulated between the control gate 6 and the tunnel oxide layer 2. If a high voltage is applied in the positive direction betwe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/115G11C16/04H01L21/8247H10B41/30H10B69/00
Inventor 胡剑杨光军
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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