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Circuit generating reverse current of interconnection line

A technology for generating circuits and reverse currents, applied in circuits, electrical components, electrical solid devices, etc., to solve problems such as increased interconnection resistance, integrated circuit aging and failure, etc.

Active Publication Date: 2013-06-19
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The long-term unidirectional current in the metal interconnection will make the resistance of the interconnection increase with the increase of use time, which will cause the aging and failure of the integrated circuit

Method used

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  • Circuit generating reverse current of interconnection line
  • Circuit generating reverse current of interconnection line
  • Circuit generating reverse current of interconnection line

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0105] Such as Figure 3a , Figure 3b shown and refer to figure 2 , when the output MOSFET of the upper circuit is a PMOS, the control pole of the PMOS is the gate, the output pole is the source, and the input MOSFET of the lower circuit is a PMOS, the control pole of the PMOS is the gate, and the input pole is the drain:

[0106] The first switch circuit 1 includes PMOS A and PMOS B, the source of the PMOS A is electrically connected to the drain of the PMOS B, the first control terminal of the first switch circuit 1 is the gate of the PMOS A, and the second control terminal is the gate of the PMOS A. The gate of PMOS B, the input terminal is the drain of the PMOS A, and the output terminal is the source of the PMOS B; the gate of PMOS A is electrically connected to the gate of the output MOSFET (PMOS) of the upper circuit, and the gate of PMOS B It is electrically connected to the gate of the input MOSFET (PMOS) of the lower circuit, and the drain of PMOS A is electrical...

Embodiment 2

[0110] Such as Figure 4a , Figure 4b shown and refer to figure 2 , when the output MOSFET of the upper circuit is a PMOS, the control pole of the PMOS is the gate, the output pole is the source, and the input MOSFET of the lower circuit is a PMOS, the control pole of the PMOS is the gate, and the input pole is the drain:

[0111] The first switch circuit 1 includes NMOS A and NMOS B, the source of the NMOS A is electrically connected to the drain of the NMOS B, the first control terminal of the first switch circuit 1 is the gate of the NMOS A, and the second control terminal is the gate of the NMOS A. The gate of NMOS B, the input terminal is the drain of the NMOS A, and the output terminal is the source of the NMOS B; the gate of the NMOS A is electrically connected to the gate of the output MOSFET (PMOS) of the upper circuit, and the gate of the NMOS B It is electrically connected to the gate of the input MOSFET (PMOS) of the lower circuit, and the drain of NMOS A is el...

Embodiment 3

[0115] Such as Figure 5a , Figure 5b shown and refer to figure 2 , when the output MOSFET of the upper circuit is PMOS, the control pole of the PMOS is the gate, the output pole is the source, and the input MOSFET of the lower circuit is NMOS, the control pole of the NMOS is the gate, and the input pole is the drain:

[0116] The first switch circuit 1 includes PMOS A and NMOS B, the source of the PMOS A is electrically connected to the drain of the NMOS B, the first control terminal of the first switch circuit 1 is the gate of the PMOS A, and the second control terminal is the gate of the PMOS A. The gate of NMOS B, the input terminal is the drain of the PMOS A, and the output terminal is the source of the NMOS B; the gate of the PMOS A is electrically connected to the gate of the output MOSFET (PMOS) of the upper circuit, and the gate of the NMOS B It is electrically connected to the gate of the input MOSFET (NMOS) of the lower circuit, and the drain of PMOS A is electr...

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Abstract

The invention discloses a circuit automatically generating a reverse current of an integrated circuit interconnection line. The circuit comprises a first switch circuit to a fourth switch circuit. Two control ends of the first switch circuit are respectively connected with a control electrode of a superior circuit output metal-oxide-semiconductor field effect transistor (MOSFET) and a control electrode of a subordinate circuit input MOSFET, an input end of the first switch circuit is connected with Vss, and an output end is connected with a node A. Two control ends of the second switch circuit are respectively connected with the control electrode of the output MOSFET and the control electrode of the input MOSFET, an input end of the second switch circuit is connected with Vdd, and an output end of the second switch circuit is connected with the node A. An input end of the third switch circuit is connected with one end, close to an output electrode of the output MOSFET, of the interconnection line, an output end of the third switch end is connected with the Vss, and a control end of the third switch circuit is connected with the node A. An input end of the fourth switch circuit is connected with the Vdd, an output end of the fourth switch circuit is connected with one end, close to an input electrode of the input MOSFET, of the interconnection line, and a control end is connected with the node A. When the superior circuit and the subordinate circuit are closed, namely, vacancy, the circuit can generate the current reversed to a normal working current in the interconnection line, an electro migration effect due to a single-direction current in the metal interconnection line is restrained, the reliability of the interconnection line is improved, and the service life of the integrated circuit is prolonged.

Description

technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to an interconnection line reverse current generation circuit. Background technique [0002] The electromigration (EM, ElectroMigration) phenomenon is a diffusion phenomenon caused by the influence of an electric field. In an integrated circuit (IC), metal interconnects (interconnects) are connected to various logic circuits, and voltage differences are generated between logic circuits due to different voltages, thereby generating current in the metal interconnects and electromigration, thereby generating The operating current makes the integrated circuit work normally. [0003] In practical applications, under the normal working state of integrated circuits, the current direction in most interconnect lines is single. For example, if figure 1 As shown, in an integrated circuit, the upper-level circuit and the lower-level circuit are connected through interconnection lines...

Claims

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Application Information

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IPC IPC(8): H01L23/58
CPCH01L2924/0002H01L2924/00
Inventor 冯军宏甘正浩
Owner SEMICON MFG INT (SHANGHAI) CORP