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Level shifting circuit and method for conducting positive voltage level shifting and negative voltage level shifting

A level shift circuit and level shift technology, which are applied in the connection/interface arrangement of logic circuits, coupling/interface of logic circuits using field effect transistors, etc., can solve the problems of low integration, high cost, large area, etc. The effect of reducing circuit area, reducing circuit cost, and improving circuit integration

Active Publication Date: 2013-07-17
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0018] The present invention solves the problems of large area, low integration and high cost in existing negative voltage level shift circuits and positive voltage level shift circuits

Method used

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  • Level shifting circuit and method for conducting positive voltage level shifting and negative voltage level shifting
  • Level shifting circuit and method for conducting positive voltage level shifting and negative voltage level shifting
  • Level shifting circuit and method for conducting positive voltage level shifting and negative voltage level shifting

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0054] In this example, the use of image 3 The working principle of positive voltage level shifting by the level shifting circuit shown will be described in detail.

[0055] Firstly, a set operation is performed on the level shift circuit. The setting operation includes: applying a first signal to the first signal terminal S1, applying a second signal to the second signal terminal S2, applying a third signal to the third signal terminal S3, and applying a fourth signal to the fourth signal terminal S4, wherein both the first signal and the fourth signal are positive-voltage high-level signals, the amplitude of the first signal is smaller than the amplitude of the fourth signal, and the first signal Both the second signal and the third signal are zero-voltage low-level signals; apply the first voltage to the first power supply terminal V1, apply the second voltage to the second power supply terminal V2, and apply the third voltage to the first power supply terminal V2. Three...

Embodiment 2

[0069] In this embodiment, still use image 3 The level shifting circuit shown performs positive voltage level shifting.

[0070] Firstly, a set operation is performed on the level shift circuit. The setting operation includes: applying a first signal to the first signal terminal S1, applying a second signal to the second signal terminal S2, applying a third signal to the third signal terminal S3, and applying a fourth signal To the fourth signal terminal S4, wherein, the first signal is a negative-voltage high-level signal, the second signal is a positive-voltage high-level signal, and the absolute value of the amplitude of the first signal is greater than that of the first signal The amplitude of the two signals, the third signal and the fourth signal are zero-voltage low-level signals; the first voltage is applied to the first power supply terminal V1, and the second voltage is applied to the second power supply terminal V2, applying a third voltage to the third power sup...

Embodiment 3

[0082] In this example, the use of image 3 The working principle of negative voltage level shifting performed by the level shifting circuit shown will be described in detail.

[0083] Firstly, a set operation is performed on the level shift circuit. The setting operation is the same as the setting operation in Embodiment 1, and will not be repeated here.

[0084] After the setting is completed, the level shift operation is performed. The level shift operation includes: keeping the first signal, the second signal, the third signal and the fourth signal input to the first signal terminal S1, the second signal terminal S2, the third signal terminal S3 and the fourth signal Terminal S4, reducing the voltage value of the second voltage to a predetermined value required to be output by the first output terminal out1, maintaining the voltage values ​​of the first voltage and the third voltage or reducing the voltage value of the first voltage and the third voltage The voltage val...

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Abstract

Provided are a level shifting circuit and a method for conducting positive voltage level shifting and negative voltage level shifting. The level shifting circuit comprises a latching unit and a driving unit. The latching unit comprises a first P-channel metal oxide semiconductor (PMOS) transistor, a second PMOS transistor, a first N-channel metal oxide semiconductor (NMOS) transistor and a second NMOS transistor. The driving unit comprises a third PMOS transistor, a fourth PMOS transistor, a third NMOS transistor and a fourth NMOS transistor. The level shifting circuit and the method for conducting positive voltage level shifting and negative voltage level shifting can reduce circuit area, improve circuit integration degree and reduce circuit cost.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a level shift circuit and a method for shifting positive and negative voltage levels. Background technique [0002] The level shift circuit converts the low-voltage control signal into a high-voltage control signal to realize the control of the low-voltage logic on the high-voltage power output stage. Generally, according to the polarity of the output high-voltage control signal, the level shift circuit can be divided into a negative voltage level shift circuit and a positive voltage level shift circuit. figure 1 with figure 2 They are circuit diagrams of an existing negative voltage level shift circuit and a positive voltage level shift circuit respectively. [0003] refer to figure 1 , the negative voltage level shift circuit includes a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a first NMOS tr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185
Inventor 杨光军胡剑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP