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Loop bandwidth test algorithm module for phase-locked loop

A technology of loop bandwidth and algorithm module, which is applied in the field of algorithm module, can solve the problems of difficult application of narrowband phase-locked loop, complicated test process, and low test accuracy, and achieve the effects of shortening time, high measurement accuracy and improving measurement accuracy

Inactive Publication Date: 2013-12-11
10TH RES INST OF CETC
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AI Technical Summary

Problems solved by technology

The disadvantages of this frequency-domain-based test method are: the test process is complicated, and spectrum analysis needs to be repeated; the test time is long; the test accuracy is low, and it is difficult to apply to narrow-band phase-locked loops

Method used

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  • Loop bandwidth test algorithm module for phase-locked loop
  • Loop bandwidth test algorithm module for phase-locked loop

Examples

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Embodiment Construction

[0011] exist figure 1 In the method, the phase-locked loop loop bandwidth test algorithm module includes a control module. The output of the control module is respectively connected with a digital direct signal synthesizer and a phase monitoring and bandwidth calculation module to form a phase-locked loop loop bandwidth test algorithm circuit. During testing, the phase-locked loop to be tested is connected in series between the digital direct signal synthesizer and the phase monitoring and bandwidth calculation module, and the error phase output of the phase-locked loop to be tested is monitored by the phase detection and calculation module. The control module outputs the control signal to the digital direct signal synthesizer and the phase monitoring and bandwidth calculation module, the output of the digital direct signal synthesizer is input to the input terminal of the tested phase-locked loop, and the error phase output of the tested phase-locked loop is ph Signals are c...

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Abstract

The invention brings forward a loop bandwidth test algorithm module for a phase-locked loop, and aims at providing the loop bandwidth test algorithm module, which is simple in test process and high in measuring accuracy, for the phase-locked loop. The invention is realized by the following technical scheme: an output end of a control module is respectively connected with a digital direct signal synthesizer and a phase monitoring and bandwidth calculating module so that a loop bandwidth test algorithm circuit for the phase-locked loop is formed. In testing, the tested phase-locked loop is connected in series between the digital direct signal synthesizer and the phase monitoring and bandwidth calculating module. The error phase output of the tested phase-locked loop is monitored by the phase monitoring and bandwidth calculating module. The digital direct signal synthesizing module generates a single frequency sinusoidal signal with a phase step, and the single frequency sinusoidal signal is inputted to the tested phase-locked loop. A time difference starting from the phase step to a second zero crossing moment is measured, and the loop bandwidth is measured according to the time difference. The loop bandwidth is measured by monitoring the error phase so that a problem of measurement of narrow band loop bandwidth is solved.

Description

technical field [0001] The invention relates to an algorithm module for testing the loop bandwidth of a phase-locked loop based on a digital circuit. Background technique [0002] At present, the loop bandwidth test of the phase-locked loop design based on digital circuits mainly adopts the method of frequency domain measurement, and the purpose of loop bandwidth measurement is achieved by analyzing and comparing the frequency spectrum of the phase-locked loop input and output. [0003] In engineering applications, the phase-locked loop bandwidth is tested from the frequency domain through the test methods of phase modulation and frequency modulation. The basic principle is to generate modulated harmonics through frequency modulation or phase modulation, and input the modulated signal into the phase-locked loop. Filtering, the amplitude measurement of the residual harmonics after filtering is used to test the loop bandwidth. The disadvantages of this frequency-domain-based ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/08H03L7/24
Inventor 曾富华
Owner 10TH RES INST OF CETC
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