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Autonomous configuration method for FPGA (field programmable gate array)-based embedded dual-core system

A configuration method and embedded technology, applied in the direction of program control device, program loading/starting, etc., can solve problems such as inability to store and load configuration files

Inactive Publication Date: 2014-04-23
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention is to solve the problem that the existing FPGA-based embedded dual-core system cannot independently complete the storage and loading of configuration files

Method used

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  • Autonomous configuration method for FPGA (field programmable gate array)-based embedded dual-core system
  • Autonomous configuration method for FPGA (field programmable gate array)-based embedded dual-core system
  • Autonomous configuration method for FPGA (field programmable gate array)-based embedded dual-core system

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specific Embodiment approach 1

[0018] Specific implementation mode 1. Combination figure 1 with Figure 4 Illustrate this embodiment, the autonomous configuration method of the FPGA-based embedded dual-core system described in this embodiment, the FPGA-based embedded dual-core system includes a FLASH memory 1, a first internal memory 2, a first external device 3, an external Memory 4, first processor 5, second processor 6, MailboxIP core 7, Mutex IP core 8, Shared BRAM IP core 9, PLBv46BRIDGE IP core 10, second internal memory 11 and second external device 12,

[0019] The FLASH memory 1, the first internal memory 2 and the first external device 3 and the external memory 4, the first processor 5, the Mailbox IP core 7, the Mutex IP core 8, the Shared BRAM IP core 9 and the PLBv46BRIDGE IP core 10 pass through the PLBv46_0 bus for data exchange,

[0020] The external memory 4, the second processor 6, the Mailbox IP core 7, the Mutex IP core 8, the Shared BRAM IP core 9 and the PLBv46BRIDGE IP core 10 excha...

specific Embodiment approach 2

[0030] Embodiment 2. The difference between this embodiment and the autonomous configuration method of the FPGA-based embedded dual-core system described in Embodiment 1 is that the FLASH memory 1 is implemented with a model of JS28F256P30.

specific Embodiment approach 3

[0031] Embodiment 3. The difference between this embodiment and the autonomous configuration method of the FPGA-based embedded dual-core system described in Embodiment 1 is that the external memory 4 is realized by a DDR2 memory model WD2RE01GX809-667G-PE.

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Abstract

The invention discloses an autonomous configuration method for an FPGA (field programmable gate array)-based embedded dual-core system, belongs to the field of embedded systems, and aims to solve the problem of incapability of a conventional FPGA-based embedded dual-core system in the autonomous storage and loading of a configuration file. The method comprises the following steps of enabling two PLBs (processor local buses) to share a FLASH memory by using a PLBv46BRIDGE IP core, designing a hardware structure of the dual-core system in Xilinx Platform Studio, generating a bit stream file, programming the bit stream file in the FLASH memory in Xilinx Software Development Kit, moving an executable file in the FLASH memory into an external memory for execution by using a bootstrapper after the system is powered on or reset, and stopping running the system until a stopping marker bit is discovered. The method can be used for aeronautics and astronautics, consumer electronics, communication, instruments and apparatuses, military equipment and industrial control.

Description

technical field [0001] The invention relates to an autonomous configuration method of an FPGA-based embedded dual-core system. It belongs to the field of embedded systems. Background technique [0002] In recent years, SOPC (System On a Programmable Chip) has been used in aerospace, consumer electronics, communications, instrumentation, military equipment, industrial It is widely used in many fields such as control. The on-chip programmable system generally uses a large-capacity FPGA as a carrier. Users can customize functional modules in an FPGA, and can add their own developed and designed logic functional modules to the system in the form of IP cores to complete the realization of specific functions. The FPGA-based on-chip programmable system has become an important implementation form of SOPC technology. At the same time, the architecture of the embedded system has developed towards the direction of dual-processor systems or even multi-processor systems. [0003] Xili...

Claims

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Application Information

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IPC IPC(8): G06F9/445
Inventor 王少军王晓璐张启荣彭宇刘大同彭喜元
Owner HARBIN INST OF TECH
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