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Two-dimensional extendable cascade structure for multiplexer

A technology of multiplexer and cascade structure, which is applied in the direction of logic circuits using basic logic circuit components, logic circuits using specific components, etc., and can solve problems such as slow speed, strict timing constraints, and increased design complexity , to achieve the effect of reducing the burden and increasing the carry speed

Active Publication Date: 2014-04-23
WUXI ESIONTECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As the function of the application system increases and the scale increases, the data flow and the number of bits that need to be processed increase accordingly. The basic module with 16-bit input can no longer meet the needs of the application. However, the realization of a larger data flow requires the use of the switch matrix. The cascading of local traces not only occupies peripheral trace resources and increases the burden of layout and routing procedures, but also slows down the speed, requires strict timing constraints, and increases the complexity of the design.

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  • Two-dimensional extendable cascade structure for multiplexer
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  • Two-dimensional extendable cascade structure for multiplexer

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Embodiment Construction

[0033] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0034] A four-input look-up table LUT4 (Look-up Table, LUT for short) can realize a 2:1 (two-bit input and one output) multiplexer MUX at most, and the multiplexer is realized by the look-up table structure The basic principle can be briefly described as follows. Table 1 is a truth table for a LUT4 to implement a 2:1 MUX, where A, B, and C are three of the four input control signals in the lookup table LUT4, which can be seen from the truth table , When C=0, Y=A; when C=1, Y=B, a 2:1 MUX is realized, where C is the selection signal, A and B are input signals, and the value in Y is searched The static address SRAM value of the table is configured, and a 2:1 MUX is realized by the method of look-up table.

[0035] In the same way, for a six-input look-up table LUT6, two of the signals can be used as selection signals, and the remaining four signals can be used as inp...

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Abstract

The invention provides a two-dimensional extendable cascade structure for a multiplexer. By the cascade structure, different extension modes are selected for configuration according to application requirements of users, 32-bit and 64-bit multiplexers are quickly realized, and the extension modes are divided into two types, namely high-speed configuration extension can realize a 64-bit input multiplexer, and data stream configuration extension can realize a wide input multiplexer and also can realize the logical application of a data stream. By the cascade structure, multiplexer structures of which basic modules are as wide as 32 bits and 64 bits are provided for the users, and because function groups are connected by a direct cascade structure, interconnection resources such as a switch matrix for locating and wiring are not required; therefore, the carrying speed can be improved, wiring resources can be utilized more fully when more complicated logic functions are configured, and the burden of a locating and wiring procedure is effectively relieved.

Description

Technical field [0001] The invention relates to a cascade structure, in particular to a cascade structure of a two-dimensional expandable multiplexer, belonging to the technical field of programmable logic devices. Background technique [0002] Programmable logic devices have short development cycle, low cost, low risk, high integration, high flexibility, and easy maintenance and upgrade of electronic systems. Therefore, they have become the mainstream of digital chips and are widely used in communication, control, video, Information processing, consumer electronics, the Internet, automobiles, aerospace and many other fields. [0003] As the most basic application of programmable logic devices, multiplexer (MUX for short) is the most basic element in logic design. Almost all combinational logic is inseparable from multiplexers, which can realize encoders. Decoders, comparators, various wide-input combinatorial logic functions, and logic extensions for adders and multipliers, and m...

Claims

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Application Information

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IPC IPC(8): H03K19/177
Inventor 冯盛刘彤霍杰万清
Owner WUXI ESIONTECH CO LTD