Cascade Structure of Two-Dimensional Scalable Multiplexers

Abstract

The present invention proposes a two-dimensional expandable multiplexer cascade structure, which can select different expansion modes for configuration according to the user's application requirements, and quickly realize 32-bit and 64-bit multiplexers. Among them, there are two types of expansion methods. High-speed configuration expansion can realize a 64-bit input multiplexer; data flow configuration expansion can realize wide-input multiplexer and logic application of data flow at the same time. The present invention provides users with a multiplexer structure with a basic module width of 32 bits and 64 bits. Since the connection between the functional function group and the functional function group is a direct cascade structure, there is no need for interconnection through the layout and wiring of the switch matrix. Resources can not only increase the carry speed, but also make full use of routing resources when configuring more complex logic functions, effectively reducing the burden of placement and routing programs.

Description

technical field [0001] The invention relates to a cascaded structure, in particular to a cascaded structure of two-dimensional scalable multiplexers, belonging to the technical field of programmable logic devices. Background technique [0002] Programmable logic devices have short development cycle, low cost, low risk, high integration, high flexibility, and easy maintenance and upgrade of electronic systems. Therefore, they have become the mainstream of digital chips and are widely used in communication, control, video, Information processing, consumer electronics, Internet, automobiles, aerospace and many other fields. [0003] As the most basic application of programmable logic devices, a multiplexer (MUX for short) is the most basic component in logic design. Almost all combinational logic is inseparable from a multiplexer, which can realize encoders, Decoders, comparators, combinational logic functions of various wide inputs, and logic extensions of adders and multipli...

AI Technical Summary

Problems solved by technology

As the function of the application system increases and the scale increases, the data flow and the number of bits that need to be processed increase accordingly. The basic module with 16-bit input can no longer meet the needs of the application. However, the realization of a larger data flow requires the use of the switch matrix. The cascading of local traces not only occupies peripheral trace resources and increases the burden of layout and routing procedures, but also slows down the speed, requires strict timing constraints, and increases the complexity of the design.

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