Optimized Montgomery modular multiplication method, optimized modular square method and optimized modular multiplication hardware

A Montgomery and hardware technology, applied in the field of modular square method and modular multiplication hardware, optimized Montgomery modular multiplication method, can solve the problems of not considering the balance between performance and area, large area, etc., to improve the transaction speed , Improve computing performance and reduce cost

Inactive Publication Date: 2014-04-30
SHANGHAI JIAO TONG UNIV
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Problems solved by technology

[0007] At present, most of the modular multipliers are designed based on the Montgomery algorithm and its deformation algorithm, and the balance between performance and area is not well considered. Either the performance is good, but the area is large, or the opposite

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  • Optimized Montgomery modular multiplication method, optimized modular square method and optimized modular multiplication hardware
  • Optimized Montgomery modular multiplication method, optimized modular square method and optimized modular multiplication hardware
  • Optimized Montgomery modular multiplication method, optimized modular square method and optimized modular multiplication hardware

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Embodiment Construction

[0053] Embodiments of the present invention will be described in further detail below in conjunction with the accompanying drawings, but the present embodiments are not intended to limit the present invention, and all similar structures, methods and similar changes of the present invention should be included in the protection scope of the present invention.

[0054] Such as figure 1 As shown, the invention discloses a kind of optimized FIOS modular multiplication method comprising the following steps:

[0055] Step 1. Let i be 0 to start the outer loop;

[0056] Step 2. Multiply the 0th word of A by the 0th word of B, add the product result to the 0th word of T, assign the low w of the addition result to S, and the high (w+1 ) bit is assigned to C;

[0057] Step 3. After multiplying S and n0, take the low w bit and assign it to m;

[0058] Step 4. Multiply m and the 0th word of N, add the product result to the (2w+1) binary number composed of (C, S), assign the low w bit to...

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Abstract

The invention discloses an optimized Montgomery modular multiplication method, an optimized modular square method and optimized modular multiplication hardware. The optimization is carried out based on an original FIOS (Finely integrated operand scanning) algorithm. The optimized modular multiplication hardware mainly comprises three single-port SRAMs, a double-port SRAM, a 32-bit multiplier, a 34-bit adder, a 4-2 compressor, a 64-bit register and six 32-bit registers. According to the optimized Montgomery modular multiplication method, the optimized modular square method and the optimized modular multiplication hardware, a high-radix modular multiplier of a two-stage parallel assembly line is adopted, the AB operation is completed through a first-stage 32-bit multiplier, the T+AB+C operation is completed through a second-stage adder, the 32-2048-bit modular multiplication operation is achieved, the area of a chip is reduced, and the modular multiplication operation performance is improved.

Description

technical field [0001] The invention relates to public key encryption technology, in particular to an optimized Montgomery modular multiplication method, a modular square method and modular multiplication hardware. Background technique [0002] With the development and application of information technology, online transactions such as online banking, e-commerce and e-government have become more and more common, and their security issues have attracted more and more attention. In order to improve the security of online transactions, the traditional block cipher algorithm is gradually replaced by the public key cryptography algorithm. The advantage of the public key cryptography algorithm is high security, but the disadvantage is that the encryption speed is much slower than the block cipher, so people have been studying how to improve the operation speed of the public key cryptography algorithm. At present, there are two main public key cryptography algorithms, one is RSA, a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72
Inventor 刘红明周玉洁朱念好
Owner SHANGHAI JIAO TONG UNIV
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