A High Performance Gated Vernier Time-to-Digital Converter

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a high-performance gating vernier type time digital converter. The high-performance gating vernier type time digital converter comprises a phase-frequency detector used for detecting rising edges of two input signals and comparing frequencies, a mode judgment device used for automatically selecting a quantization mode according to the amplitude of the input signals, a quantization unit used for achieving first-step quantization through a single-bit DSSA structure and conducting second-step quantization on the input signals through Vernier GRO, a multiphase counter used for reading a quantization result of the Vernier GRO, a loop locking accelerating unit used for recording the number and the classification of the rising edges of the input signals in a TDC dead zone and correcting TDC output and an assessment logical circuit used for conducting summing operation on multiphase counter output and conversion of original complements is conducted on the TDC output according to a PFD output frequency comparison result. According to the high-performance gating vernier type time digital converter, the obtained resolution ratio of the time digital converter is high, the measurement range is large, and the sample rate is high.

Description

technical field [0001] The invention belongs to the technical field of phase-locked loop integrated circuits, and in particular relates to a high-performance gated vernier type time-to-digital converter (TDC) applied to a fractional frequency-division all-digital phase-locked loop. Background technique [0002] Time-to-digital converters, which can measure the tiny time intervals between signals, are widely used in scientific research and engineering technology, such as particle life cycle measurement in high-energy physics, laser detection, medical imaging, on-chip jitter measurement, time-of-flight (TOF ) measurement and so on. With the continuous improvement of microelectronics design and technology level, performance indicators such as TDC resolution have been improved, and it has been increasingly used in all-digital phase-locked loops. Compared with the traditional analog phase-locked loop, the all-digital phase-locked loop (ADPLL) has the advantages of good portabili...

AI Technical Summary

Problems solved by technology

When the falling edge of In1 lags In2 ​​by more than 120ps, the comparator is falsely triggered, as shown in (c), which limits the amplitude of the input signal from exceeding this threshold, thus restricting the improvement of the TDC measurement range

[0009] The second problem is that the design of the gated ring oscillator is limited, which restricts the improvement of the relationship between resolution, measurement range and sampling rate.

according to 【3】 description, t gating-delay It can reach more than 200ps, which restricts τ 2 The reduction of the resolution makes the trade-off relationship between resolution, measurement range and sampling rate poor

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