Decoding method for LDPC coder
A decoder and decoding technology, applied in the field of termination decoding, can solve the problems of high power consumption, incomplete termination decoding conditions, high bit error rate, etc., and achieve the effect of ensuring correctness
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[0037] The hardware implementation logic block diagram of the present invention is as image 3 , The specific implementation steps are as follows: S1, what is needed to decode this layer The information and verification information are respectively taken out from the posterior information storage module and the verification information storage module, and the The sign bit is temporarily stored. S2, send the data to the arithmetic unit to update the verification information and posterior information S3, calculate the calibration equation Hi T x and determine whether the sign bit is flipped through exclusive OR. S4. Store the new posterior information and verification information back to the storage module. If S3 is satisfied, output the decoding result, otherwise return to S1 to start the next iteration until the maximum number of iterations is reached.
[0038] In order to solve all calibration equations satisfying H T x=0, but the decoding is not necessarily completely corre...
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