Semiconductor memory system

Abstract

A semiconductor memory system includes a semiconductor memory configured to provide an external circuit with a plurality of refresh characteristic information and perform an auto-refresh operation in response to a plurality of auto-refresh commands, and a memory controller configured to provide the semiconductor memory with the plurality of auto-refresh commands generated according to the plurality of refresh characteristic information.

Description

[0001] Cross references to related applications [0002] This application claims the priority of the Korean patent application with the application number 10-2013-0018041 filed with the Korean Intellectual Property Office on February 20, 2013, the entire content of which is incorporated herein by reference. Technical field [0003] Various embodiments relate to a semiconductor circuit, and more specifically, to a semiconductor storage system. Background technique [0004] figure 1 It is a block diagram illustrating the configuration of the semiconductor memory 1 according to the known technology. [0005] The semiconductor memory according to the known technology has a plurality of independently operating channels. [0006] That is, as figure 1 As shown in, the semiconductor memory 1 according to the known technology includes a plurality of channels CHANNEL A to CHANNEL D. [0007] Each of the plurality of channels CHANNEL A to CHANNEL D includes a peripheral circuit block. [0008] In t...

AI Technical Summary

Problems solved by technology

[0012] Compared with channels with good refresh characteristics, channels with poor refresh characteristics need to perform frequent refresh operations

[0013] Therefore, according to the known technology, since a channel with good refresh characteristics also performs a refresh operation with substantially the same period as a channel with poor refresh characteristics, unnecessary current consumption occurs, resulting in an increase in the overall current consumption of the semiconductor memory.

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