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CPCI serial port plate based on state machine and on-chip bus and working method of CPCI serial port plate

An on-chip bus and state machine technology, applied in the field of computer communication, can solve problems such as complex structure, insufficient functions, and poor compatibility of on-chip systems, and achieve the effect of ensuring expansion capabilities

Inactive Publication Date: 2014-09-03
BEIJING JIAXUN FEIHONG ELECTRIC CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] Aiming at the problems that the current CPCI asynchronous serial port board has long response delay time, waste of FPGA resources, complex structure of the system on chip, poor scalability, insufficient functions, and poor compatibility, the present invention proposes a CPCI asynchronous serial port based on FPGA state machine and WB bus Board and how it works

Method used

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  • CPCI serial port plate based on state machine and on-chip bus and working method of CPCI serial port plate
  • CPCI serial port plate based on state machine and on-chip bus and working method of CPCI serial port plate
  • CPCI serial port plate based on state machine and on-chip bus and working method of CPCI serial port plate

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Embodiment Construction

[0033] The present invention abandons the traditional method of using embedded processors and programs as processing units, fully utilizes the characteristics of high-speed parallel processing, configuration and flexible expansion of large-scale logic circuits, and realizes communication functions. Realize a system based on the FPGA state machine and WB on-chip bus on the FPGA chip, adopt the on-chip bus operation mode of one master and multiple slaves, and integrate the processing unit, 8 or 16-channel asynchronous transceiver, and dual-port SDRAM sticky logic on the chip , address decoder, configuration status register area, serial port receiving signal filtering logic and other circuits. The processing unit, as the only master logic of the on-chip bus, can access multiple slave logics; the asynchronous transceiver soft core supports the WB on-chip bus, which is compatible with the NS16550A device. Utilizing the configuration capability of FPGA and the compatibility and expa...

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Abstract

The invention belongs to the field of computer communication, and particularly relates to a CPCI serial port plate based on an FPGA state machine and a WB on-chip bus and a working method of the CPCI serial port plate. By the adoption of a single-master and multi-slave on-chip bus running mode, the CPCI serial port plate comprises a processing unit, 8-access or 16-access asynchronous transceivers, dual-port SDRAM adhesion logic, an address decoder, a configuration state register area, serial port received signal filtering logic and other circuits. Soft cores of the asynchronous transceivers support the WB on-chip bus. The asynchronous transceivers are compatible with an NS16550A device. A board serial port has the expansion capacity. The communication rate of serial ports is larger than 2 Mbps, and each serial port is provided with six byte data buffer areas. The delay time between communication transceiving frames can be adjusted in 256 gears, the longest delay time is 10 us, the shortest delay time is 2.56 milliseconds, and the error is smaller than 0.1 us. An upper computer can configure the serial ports independently and monitor the serial ports comprehensively, multi-serial-port data transceiving, processing and storing procedures are executed through the FPGA state machine, and time sequence performance is highlighted.

Description

technical field [0001] The invention belongs to the technical field of computer communication, and in particular relates to a CPCI serial board based on an FPGA state machine and a WB on-chip bus and a working method thereof. Background technique [0002] The computer communication adapter is an information communication bridge between the computer and external equipment. It has functions such as two-way communication, data buffering, and parameter setting. It is mainly used for data communication, status monitoring, experimental testing, and maintenance of external equipment. CompactPCI (Compact Peripheral Component Interconnect, Compact Peripheral Component Interconnect Standard, hereinafter referred to as CPCI) asynchronous serial port board is installed in the CPCI expansion slot of the computer. There are CPCI bus controller module, multi-channel asynchronous serial port module and data processing unit on the board card And the data buffer, can realize the asynchronous ...

Claims

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Application Information

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IPC IPC(8): G06F13/40G06F13/38
Inventor 韩怀宇袁凤肖巨军王锋周东朋艾重阳
Owner BEIJING JIAXUN FEIHONG ELECTRIC CO LTD
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