Gate line drive circuit of array substrate and display device

Abstract

An embodiment of the invention provides a gate line drive circuit of an array substrate and a display device, belongs to the technical field of displaying and aims to reduce short circuit of a GOA (gate driver on array) unit caused by ESD (electro-static discharge) and to increase yield of a GOA circuit. The GOA circuit comprises the GOA unit and an STV (vertical start pulse) signal line electrically connected with the GOA unit; the STV signal line comprises a first portion and a second portion; the GOA circuit further comprises a first transparent electrode and an insulting layer arranged between the first transparent electrode and the first portion; the first transparent electrode, the first portion and the insulating layer form a first capacitor. The GOA circuit according to the embodiment is applicable to the technical field of displaying.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a grid row driving circuit of an array substrate and a display device. Background technique [0002] A liquid crystal display is a commonly used flat panel display at present, and a TFT-LCD (Thin Film Transistor Liquid Crystal Display, Thin Film Field Effect Transistor Liquid Crystal Display) is currently a mainstream product in the liquid crystal display. With the increasingly fierce competition of TFT-LCD products, various manufacturers adopt new technologies to reduce the cost of products and improve the market competitiveness of products. Among them, the GOA (Gate Driver on array, array substrate row driving) technology refers to integrating the gate driver (Gate Driver) of the TFT-LCD on the array substrate to form a scanning drive for the panel. Compared with traditional Chip On Flex / Film (COF) and directly bonded on glass (Chip On Glass, COG) processes, the main ...

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Problems solved by technology

[0003] At present, GOA technology has been widely used in the field of TFT-LCD manufacturing. However, due to the complexity of its circuit connection and process, the yield rate of GOA circuits is very low. Among them, one of the main factors affecting its yield rate is static electricity accumulation and ESD ( Electro-Static discharge, electrostatic discharge), in the manufacturing process of existing GOA circuit, because STV (Vertical Start Pluse, frame open pulse signal) signal line is longer, easily accumulates a large amount of charges in plasma vapor deposition environment, and When these charges are released to the inside of the GOA unit, it is easy to cause the GOA unit to be electrostatically broken down, resulting in a short circuit of the GOA unit, making the GOA circuit unable to work normally, resulting in the failure of the display device to display the picture normally.

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