Wafer Defect Scanning Method

Abstract

The invention discloses a wafer defect scanning method. The method comprises: providing a wafer comprising multiple repeated chip units, a storage area and a non-storage area which define each chip unit; dividing the storage area in each chip unit to a first scanning area, and dividing the non-storage area to a second scanning area; executing secondary defect scanning, scanning the first scanning area by use of incident light with first light intensity so as to obtain defects of the first scanning area, and scanning the second scanning area by use of incident light with second light intensity smaller than the first light intensity so as to obtain defects of the second scanning area; and merging the defects of the first scanning area with the defects of the second scanning area. The wafer defect scanning method can improve the defect capturing capability of the storage area.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer defect scanning method. Background technique [0002] With the rapid development of semiconductor manufacturing technology, the line width of product devices is constantly decreasing, and defects will cause greater damage to product yield. Therefore, improving the ability to capture chip defects has become an important means to improve semiconductor yield. [0003] Flash (flash memory) chip is an important type of memory chip, which includes a large area of ​​repeated storage units, and peripheral auxiliary computing circuits. The storage unit of the Flash (flash memory) chip will use the smallest line width to improve the ability to store data per unit area, and the accompanying defects of the storage unit will have a great impact on the yield rate of the flash chip. Therefore, there is a need to efficiently capture the defects of repeated memory cel...

AI Technical Summary

Problems solved by technology

[0005] Since the scanning program in the prior art uses a single incident light to scan defects on the entire chip, the scanning machine can only scan defects in different regions of the chip at the same time with a moderate intensity of incident light. There are two main problems in the scanning process. First, it is difficult to realize accurate scanning of darker topographical features. Second, in order to increase the detection capability of repeated memory cells, increasing the intensity of incident light will inevitably cause a large number of interference signals to appear in the peripheral auxiliary computing circuit area, which will affect the program capture defects. the accuracy of

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