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High-speed circuit board serial port debugging method based on FPGA and DSP

A debugging method and serial debugging technology, which is applied in electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as failure of simulation, errors, and the inability of the simulator to complete hardware simulation, and the method is simple and convenient. less error-prone effect

Inactive Publication Date: 2014-12-10
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Using a hardware emulator is indeed a very effective method, but there are also some disadvantages; many emulators cannot achieve complete hardware emulation, which will cause normal simulation, but errors occur during actual operation; normal situation

Method used

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  • High-speed circuit board serial port debugging method based on FPGA and DSP

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specific Embodiment approach 1

[0028] Specific implementation mode one: combine figure 1 Describe this embodiment, the debugging method of the high-speed circuit board serial port based on FPGA and DSP described in this embodiment,

[0029] Described method is realized based on FPGA, DSP and CPLD, and described method comprises:

[0030] Adopting FPGA to determine the timing of running DSP to carry out serial port debugging, the timing includes the steps of receiving timing and sending timing;

[0031] According to the determined timing, the steps of using DSP to realize serial port debugging;

[0032] Steps to use CPLD to provide normal level range for DSP and FPGA.

[0033] In this embodiment, the function of CPLD is to provide normal level range for DSP and FPGA, including:

[0034] Define various ports, such as connection lines with FPGA, etc.

[0035] Write a high-low level conversion program to provide external operating conditions for FPGA and VME bus.

specific Embodiment approach 2

[0036] Specific embodiment two: this embodiment is a further limitation to the debugging method of the high-speed circuit board serial port based on FPGA and DSP described in specific embodiment one, and described receiving sequence comprises:

[0037] Steps for setting clock input, high-level reset signal, RS422 data receiving terminal and data receiving flag bit interface definition;

[0038] It is used to set when the input signal encounters the corresponding edge, the serial signal edge detection module detects that the signal is set to a high level for one cycle;

[0039] It is used to set the steps of sampling data by the baud rate module when the clock drops;

[0040] Steps for setting the idle line detection module;

[0041] It is used to set the state machine and set the corresponding processing steps after the state machine.

specific Embodiment approach 3

[0042] Specific embodiment three: present embodiment is the further limitation to the debugging method of the high-speed circuit board serial port based on FPGA and DSP described in specific embodiment two,

[0043] The receiving sequence includes:

[0044] Steps for setting clock input, high-level reset signal, RS422 data receiving terminal and data receiving flag bit interface definition;

[0045] It is used to set when the input signal encounters the corresponding edge, the serial signal edge detection module detects that the signal is set to a high level for one cycle;

[0046] It is used to set the steps of sampling data by the baud rate module when the clock drops;

[0047] Steps for setting the idle line detection module;

[0048] It is used to set the state machine and set the corresponding processing steps after the state machine;

[0049] Steps for reading and writing signal settings and sending data.

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Abstract

The invention discloses a high-speed circuit board serial port debugging method based on an FPGA and a DSP, and belongs to the field of circuit board serial port debugging. The high-speed circuit board serial port debugging method aims at solving the problem that errors are likely to exist when an existing hardware emulator is used for debugging a circuit board serial port. The method is implemented based on the FPGA, the DSP and a CPLD. The method comprises the steps that the FPGA is adopted for determining the timing sequence of running the DSP for serial port debugging, wherein the timing sequence comprises the steps of timing sequence receiving and timing sequence transmitting; according to the determined timing sequence, the DSP is adopted for achieving serial port debugging; the CPLD is adopted for supplying normal level range to the DSP and the FPGA. The high-speed circuit board serial port debugging method is used for circuit board serial port debugging.

Description

technical field [0001] The invention belongs to the field of circuit board serial port debugging. Background technique [0002] The serial port occupies a very important position in the circuit board. The debugging of the serial port program in the traditional way often uses a dedicated DSP hardware emulator. After writing the program, use the emulator to set breakpoints, observe variables and the flow of the program, debug the program step by step, and correct errors. Using a hardware emulator is indeed a very effective method, but there are also some disadvantages; many emulators cannot achieve complete hardware emulation, which will cause normal simulation, but errors occur during actual operation; normal situation. Contents of the invention [0003] The purpose of the invention is to solve the error-prone problem when the current hardware emulator debugs the serial port of the circuit board. The invention provides a debugging method for the serial port of the high-s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 陈兴林刘法志刘帅刘启循魏凯张之万范文超杨绪东
Owner HARBIN INST OF TECH
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