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A system for testing resistive memory array

A resistive variable memory and array technology, applied in static memory, instruments, etc., can solve problems such as expensive

Active Publication Date: 2018-02-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Application Information

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Problems solved by technology

[0004] At present, the array testing machine for testing resistive memory arrays on the market is expensive, and there is no comprehensive testing method for the development of new resistive memory arrays with special structures. The main technical problems faced are: how to meet the requirements of new storage technology Requirements for multifunctional comprehensive testing from materials, devices to arrays; how to embed design software into the system in software and hardware control to complete automatic addressing of storage cells in storage arrays and automatic conversion of array test modes, etc.

Method used

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  • A system for testing resistive memory array
  • A system for testing resistive memory array
  • A system for testing resistive memory array

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Embodiment Construction

[0030] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0031] The system for testing a resistive memory array provided by the present invention is designed by designing a software control interface, a hardware address selection circuit and a probe card, and on the basis of software control of the measurement source table, in coordination with the hardware address selection circuit, and integrating the probe card. On the probe station, the entire test process is completed, so as to achieve the performance evaluation of the memory array.

[0032] like figure 1 shown, figure 1 It is a schematic structural diagram of a system for testing resistive memory arrays provided by the present invention. The system includes a semi-automatic probe station (supporting a vacuum pump, a CCD camera and a probe ...

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Abstract

The invention discloses a system for testing a resistive memory array, comprising: a probe station for carrying the resistive memory array to be tested; a probe card for realizing the connection between the hardware address circuit and the resistive memory array to be tested Good connection; the hardware address selection circuit is used to complete the address decoding and gating work of the designated port of the resistance variable memory array to be tested; the constant voltage source meter is used to provide DC voltage to the hardware address selection circuit; the measurement source meter is used to Provide the operating voltage required for device testing; the control host is used to control the entire system to perform different types of test operations, and complete the output and statistical analysis of test result data. Aiming at the problem that the performance of the resistive memory array with a special structure cannot be evaluated, the present invention uses the existing experimental equipment to not only realize the test and evaluation of the device performance at low cost, but also provide a basis for the subsequent test and detection of other array structure devices. A way of thinking and method.

Description

technical field [0001] The invention relates to the technical field of semiconductor testing in microelectronics, in particular to a system for testing novel resistive memory arrays with structures such as CrossBar and 1T1R. Background technique [0002] With the advent of the era of mass storage, storage technology has become the main driving force for the advancement of semiconductor technology and has dominated the global semiconductor market. Semiconductor memory products also have an irreplaceable position in my country, occupying the largest market share in the entire integrated circuit industry. [0003] Resistive memory, as a memory that uses a non-charge storage mechanism, will have a lot of room for development below the 32nm process node, and the design of resistive memory arrays that meet the needs of large-scale production and applications is extremely critical. Testing memory arrays is also an issue that requires constant research and exploration. [0004] At...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
Inventor 姚志宏余兆安吕杭炳霍宗亮谢常青刘明
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI