High-performance imprecise floating point adder and application method thereof

Abstract

The invention discloses a high-performance imprecise floating point adder and an application method thereof. The imprecise floating point adder consists of an imprecise index adder, a mantissa exchanging unit, a shifting unit, an imprecise mantissa adder, a symbolic logic unit, an index updating unit and an imprecise regularization unit, wherein high m bits of the imprecise index adder and the imprecise mantissa adder are provided with precise pointing adders, and lower n bits of the imprecise index adder and the imprecise mantissa adder are provided with imprecise pointing adders. When the high-performance imprecise floating point adder is applied, the bit numbers of the precise pointing adders in the imprecise index adder and the mantissa adder and the bit numbers of the imprecise pointing adders need to be determined by virtue of a software simulation method. The high-performance imprecise floating point adder is capable of adapting to floating point numbers with various precision, which conform to the IEEE754 protocol, is a novel, high-speed and small-area floating point adder with lower energy consumption and has extensive application prospect in the field of digital signal processors.

Description

technical field [0001] The invention relates to the field of inaccurate circuit design, in particular to a high-performance inaccurate floating-point adder and an application method thereof. Background technique [0002] With the continuous enrichment and development of embedded systems, especially mobile devices such as mobile phones and tablet computers, power consumption has become one of the key issues in digital integrated circuit design. The industry's requirements for chip design have changed from pursuing high performance and small area to comprehensive requirements for performance, area and power consumption. Therefore, under the premise of ensuring circuit performance, reducing the power consumption of digital integrated circuits has become a research focus in academia and industry. [0003] Studies have shown that reducing the calculation accuracy can save corresponding energy consumption, and at the same time, this energy saving and power consumption reduction a...

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Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a high-performance non-accurate floating-point adder and its application method for the defects of the existing floating-point adder. The floating-point adder has small area, high speed and low power consumption, and can Accepts floating point numbers of various precisions conforming to the IEEE 754 protocol

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