Integrated circuit with backside structure reducing substrate warpage

Abstract

The present invention improves wafer warpage caused by deep trench capacitors through structures formed on the reverse side of the wafer. The structure on the reverse side includes a tensioned membrane. A tension film can be formed in the trenches on the backside of the wafer, which enhances its effect. In some embodiments, wafers are used to form 3D-IC devices. In some embodiments, a 3D-IC device includes high voltage or high power circuitry. The invention also discloses an integrated circuit with a backside structure that reduces substrate warpage.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an integrated circuit with a backside structure that reduces substrate warpage. Background technique [0002] Since the invention of the integrated circuit, the semiconductor industry is constantly looking for ways to increase the integration of integrated circuit components (transistors, diodes, resistors, capacitors, etc.). In most cases, the increase in density comes from a reduction in feature size, allowing more components to be formed in a given area. Despite these advances, the components have remained in a basic two-dimensional layout. While substantial increases in density have been achieved within the constraints of two-dimensional layouts, further advances have been difficult to achieve. [0003] Three-dimensional integrated circuits (3D ICs) have been created to overcome these limitations. In a 3D IC, two or more semiconductor bodies are formed vertically al...

AI Technical Summary

Problems solved by technology

Although substantial increases in density have been achieved within the constraints of two-dimensional layouts, further advances have been difficult to achieve

Images