A digital output buffer and its control method

Abstract

A digital output buffer and the control method therefor are disclosed. The digital output buffer includes a timing generator(1), an integrator(2), a residual current detector(3), an energy storage device(4), an inductor L, a load capacitor CL, a first transistor SW1, a second transistor SW2 and a third transistor SW3. The energy storage device(4), the inductor L, the load capacitor CL, the first transistor SW1, the second transistor SW2 and the third transistor SW3 constitute the main circuit of the digital output buffer, and the integrator(2) and the residual current detector(3) constitute the negative feedback circuit of the digital output buffer. Thereby, the power consumption of the digital output buffer can be effectively reduced.

Description

technical field [0001] The invention relates to the technical field of output buffers, in particular to a digital output buffer and a control method thereof. Background technique [0002] As the frequency of digital signals increases, the digital output buffer consumes a lot of power when output buffering the data. Therefore, it is necessary to design a digital output buffer that reduces power consumption. [0003] Chinese Patent Publication No. CN103269217, published on August 28, 2013, the name of the invention is output buffer, the application discloses an output buffer, which includes first and second transistors and a self-bias circuit, the first The transistor has a control electrode, an input electrode coupled to the output terminal, and an output electrode. The second transistor has a control electrode, an input electrode coupled to the output electrode of the first transistor, and an output electrode coupled to a reference voltage. The self-bias circuit is coupled ...

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Problems solved by technology

The downside is that the output buffer consumes a large

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