Differential anomaly detection and compensation method, device and high-precision clock recovery system

An abnormal detection and compensation device technology, applied in transmission systems, synchronization devices, digital transmission systems, etc., can solve problems such as inability to achieve real-time detection, complex compensation implementation, and complex detection algorithms, achieving simple compensation, simple detection algorithms, Compensate for high precision effects

Inactive Publication Date: 2017-08-04
JIAWEI COMM TECH SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] 1. Real-time detection cannot be achieved, and the judgment can only be made after N+Y points after the link delay mutation occurs;
[0012] 2. The detection algorithm is complex. In the detection process, the algorithm of curve fitting needs to be used all the time;
[0013] 3. The implementation of compensation is complicated, and it is necessary to find the maximum value according to the fitted curve as the sudden change value of link delay, and save the sudden change value of link delay, and then superimpose it on each subsequent minimum delay point;

Method used

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  • Differential anomaly detection and compensation method, device and high-precision clock recovery system
  • Differential anomaly detection and compensation method, device and high-precision clock recovery system
  • Differential anomaly detection and compensation method, device and high-precision clock recovery system

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Embodiment Construction

[0069] The present invention will be further described below with reference to the drawings and embodiments.

[0070] Example of differential anomaly detection and compensation method

[0071] image 3 A flowchart of a preferred embodiment of the differential anomaly detection and compensation method of the present invention is shown. See image 3 The implementation steps of the differential anomaly detection and compensation method of this embodiment are described in detail as follows.

[0072] Step S1: Abnormal point detection: Based on the current minimum delay point and the last minimum delay point, it is detected whether the current minimum delay point is a normal point or an abnormal point.

[0073] Step S2: Link delay mutation detection: Based on the first step, determine whether the input minimum delay point and the next minimum delay point are normal or abnormal points to determine whether the input minimum delay point is a link delay change point.

[0074] Step S3: Compensa...

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Abstract

The invention discloses a differential anomaly detection and compensation method and device and a high-precision clock recovery system. The difference of the minimum time delay point is utilized, detection is quick, and a differential anomaly can be detected at the next point after link time delay mutation occurs; the detection algorithm is simple, and only difference and comparison operations need to be performed; compensation is simple and high in accuracy, and the specific value of the link time delay mutation does not need to be calculated specifically. According to the technical scheme, the method comprises the steps that (1) abnormal point detection is performed, wherein whether the current minimum time delay point is a normal point or an abnormal point is detected based on the current minimum time delay point and the last minimum time delay point; (2) link time delay mutation detection is performed, wherein based on the step (1), whether the input minimum time delay point and the next minimum time delay point of the input minimum time delay point are normal points or abnormal points are judged, and whether the input minimum time delay point is a link time delay change point or not is judged; (3) link time delay mutation compensation is performed, wherein the subsequent minimum time delay point is compensated.

Description

Technical field [0001] The present invention relates to a clock recovery mechanism, in particular to a method and system for realizing high-precision clock recovery through detection and compensation of sudden changes in link time delay. Background technique [0002] In packet switching networks, the clock recovery mechanism mainly includes two parts, such as figure 1 Shown: At the sending end, according to the sending end clock, a data packet carrying the sending end clock information is generated. The data packet can be a special data packet, or it can be attached to other data packets. After the data packet is generated, it is transmitted to the packet-switching network from the sender and finally reaches the receiver. At the receiving end, according to the received data packet containing clock information, the corresponding clock is recovered, and the clock of the receiving end is synchronized with the clock of the sending end. [0003] One of the most obvious characteristics...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00H04L12/26
Inventor 高俊明郭展鹏刘佳汝峰姚剑锋钱嬴
Owner JIAWEI COMM TECH SHANGHAI
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