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A data communication circuit and method based on phase noise measurement

A data communication and phase noise technology, which is applied in electrical digital data processing, instruments, etc., can solve the problems of data unable to realize parallel FFT operation and reduce operation efficiency, and achieve the effect of meeting real-time transmission and processing requirements and improving data processing speed.

Active Publication Date: 2017-11-17
THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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  • Claims
  • Application Information

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Problems solved by technology

[0009] (3) Due to the limitation of single-core DSP, the A and B channel data cannot realize parallel FFT operation, and can only be executed in the order of the main program MainISR call, which reduces the operation efficiency

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  • A data communication circuit and method based on phase noise measurement
  • A data communication circuit and method based on phase noise measurement
  • A data communication circuit and method based on phase noise measurement

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Embodiment Construction

[0043] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0044] At present, with the wide application of FPGA and DSP high-speed communication bus SRIO, and the emergence of multi-core DSP chips, new requirements are put forward for efficient data communication between FPGA and DSP and timely and effective data processing.

[0045] Combining the characteristics of fast operation speed of multi-core DSP and high-speed transmission of SRIO bus, the invention discloses a phase noise measurement-based FPGA and multi-core...

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Abstract

The present invention proposes a data communication circuit and method based on phase noise measurement, including: FPGA end channel A, B data buffers, DSP end receiving buffers A, B, CORE0 task scheduling and distribution components, CORE1 FFT calculation components, CORE2 FFT calculation unit, CORE3 cross-correlation calculation unit and result buffer; FPGA-side sending buffer A and B are composed of data in any 4 of the 9 FIFOs in the order of first-in-first-out; CORE0 task scheduling and allocation unit, The CORE1 FFT computing part and the CORE2 FFT computing part adopt a master-slave model, and the CORE0 task scheduling and distribution part realizes task scheduling and allocation; processing mechanism.

Description

technical field [0001] The invention relates to the technical field of testing, in particular to a data communication circuit based on phase noise measurement, and also to a data communication method based on phase noise measurement. Background technique [0002] As a manifestation of short-term frequency stability in the frequency domain, phase noise is an important indicator of many modern electronic devices, and its corresponding test equipment has also received extensive attention. With the development of modern electronic technology, higher and higher requirements are put forward for the phase noise test sensitivity and resolution of the phase noise test system. The improvement of phase noise test sensitivity and resolution depends not only on the selection of high-performance devices, but also on the realization of complex calculations and processing of large quantities of collected data, for example: performing 10,000 times of cross-correlation Sensitivity of operati...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38
Inventor 刘宝东杜念文任水生刘强白轶荣
Owner THE 41ST INST OF CHINA ELECTRONICS TECH GRP