On-chip network topology and routing algorithm of a multi-core cryptographic processor

Abstract

An embodiment of the present invention provides an on-chip network topology and routing algorithm of a multi-core cryptographic processor, wherein the on-chip network topology includes: a plurality of tree-shaped processor groups, and routing units corresponding to the number of the plurality of tree-shaped processor groups ; Wherein, a routing unit corresponds to a tree-shaped processor group, and the tree-shaped processor groups are interconnected through corresponding routing units using a 2D-Mesh network structure; each tree-shaped processor group includes: a data distribution controller, a data output A controller and N cryptographic processors, where N is an integer greater than 1; the data distribution controller, data output controller and N cryptographic processors of each tree-shaped processor group, and the corresponding routing unit adopt a tree-shaped NoC network structure connect. The invention improves and optimizes the comprehensive performance of the on-chip network topology structure of the multi-core cryptographic processor.

Description

technical field [0001] The invention relates to the technical field of processors, and more specifically relates to an on-chip network topology and routing algorithm of a multi-core cryptographic processor. Background technique [0002] A multi-core cryptographic processor refers to a collection of cryptographic processors formed by the integration of multiple heterogeneous or isomorphic cryptographic processors; a multi-core cryptographic processor has the advantages of large communication bits, complex and diverse communication methods, and flexible and variable communication methods. It plays an important role in realizing more diverse, complex and high-speed cryptographic algorithms and information security protocols, so the development of multi-core cryptographic processors has attracted great attention. [0003] A key point to realize inter-core communication of multi-core cryptographic processors is the realization of the network-on-chip (NoC) structure. NoC is a new ...

AI Technical Summary

Problems solved by technology

[0005] In view of this, an embodiment of the present invention provides an on-chip network topology and routing algorithm of a multi-core cryptographic processor to solve the problem of poor overall performance of the existing multi-core cryptographic processor's on-chip network topology

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