Loss of Clock Signal Detection Circuit

Abstract

The invention discloses a clock signal loss detection circuit comprising a first inverter, a second inverter, a third inverter and an OR gate. The input end of the first inverter is connected to the clock signal, and the clock signal is inverted by the third inverter and then input to the input end of the second inverter. The output terminals of the first and second inverters are respectively connected to one of the two input terminals of the OR gate and to a capacitor. Both the first inverter and the second inverter are current-controlled rising-edge inverters. The rising edges of the output terminals of the first inverter and the second inverter respectively charge the capacitor through the current source so that the node is logic 0 at the end of the entire charging cycle. The output terminal of the OR gate outputs a detection signal. The invention can realize the loss detection of the clock signal without using the reference clock signal, and improves the accuracy and reliability of the detection.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a clock signal loss detection circuit. Background technique [0002] Clock (Clock) is widely used in integrated circuits, and the accuracy and stability of the clock signal determine the reliability of the circuit. Loss of a clock signal can have serious consequences, such as potentially malfunctioning circuitry or degraded performance. Therefore, it is necessary to adopt a clock signal loss detection circuit to realize the detection of the clock signal. [0003] The clock signal loss detection circuit generally needs to use a reference clock to detect the clock signal to be detected, that is, to detect the presence or absence of the B clock signal by using the A clock signal as a reference signal. Since another clock signal needs to be relied on, if the master clock is lost, that is, the reference clock signal also has a problem, it will not be possible to correctly determ...

AI Technical Summary

Problems solved by technology

Due to the need to rely on another clock signal, if the main clock is lost, that is, the reference clock signal is also faulty, it will not be able to correctly determine whether the clock signal to be detected is lost

Images