POS deframing and framing device and method based on multi-protocol link encapsulation technology

Abstract

The invention discloses a POS deframing and framing device and method based on multi-protocol link encapsulation technology, the device includes an FPGA deframing and framing module, and multiple input and output interfaces arranged on ports of the FPGA deframing and framing module ; The FPGA deframing and framing module includes an FPGA chip unit, through which the POS message is deframed to obtain an IP data packet, and the IP data packet is encapsulated into an Ethernet format to obtain corresponding Ethernet data; each input and output The interface is respectively used to output the POS message of a link to the FPGA deframing and framing module, and output the Ethernet data obtained after the POS message passes through the FPGA deframing and framing module; the method is to use the POS solution of the device Frame framing method. The invention can realize the deframing and framing of POS messages without using a dedicated POS deframing and framing chip, and has the advantages of high efficiency, low power consumption and low required cost.

Description

technical field [0001] The present invention relates to the technical field of POS (PacketOverSONET / SDH, packet switching based on SONET / SDH), in particular to a POS deframing and framing device and method based on multi-protocol link encapsulation technology. Background technique [0002] POS (Packet Over SONET / SDH) technology refers to a technology that uses the high-speed transmission channel provided by SONET (Synchronous Optical Network) / SDH to directly transmit IP (Internet Protocol, Internet Internet Protocol) packet groups. It puts the IP layer on the SDH network to run, avoiding some indirect costs in the communication process. POS is positioned in the carrier-scale data backbone network, and its network is mainly connected by large-capacity high-end routers via high-speed optical fiber transmission channels. POS uses links and PPP (Point to Point Protocol, Point-to-Point Protocol) protocols to encapsulate data packets, retaining the connectionless-oriented charact...

AI Technical Summary

Problems solved by technology

However, this structure limits the number of POS interfaces and ETH interfaces of the device at the beginning of the design, and binds the interface attributes of each port, reducing the flexibility and availability of the device interface. On the other hand, adding a chip between the optical module and the FPGA It also reduces the integration and stability of the device, and the addition of multiple Framer chips also increases a large amount of equipment cost overhead

Images