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A circuit for increasing the digital data transmission rate in a digital-to-analog converter

A technology of digital-to-analog converter and digital data, which is applied in the circuit field of increasing the transmission rate of digital data in the digital-to-analog converter, and in the field of circuits for increasing the transmission rate of digital data, which can solve the problem that the transmission speed of data synchronization high-speed digital data port cannot meet the speed requirements and other issues to achieve the effect of reducing the difficulty of synchronization

Active Publication Date: 2018-01-19
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem solved by the present invention is: to overcome the deficiencies of the prior art, provide a circuit for increasing the digital data transmission rate in the digital-to-analog converter, solve the data synchronization problem in the high-speed digital data transmission process and high-speed digital data port transmission The speed cannot meet the speed requirements. By increasing the digital data transmission rate, the output data frequency of the digital-to-analog converter is greatly improved, and the application range of the digital-to-analog converter is expanded.

Method used

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  • A circuit for increasing the digital data transmission rate in a digital-to-analog converter
  • A circuit for increasing the digital data transmission rate in a digital-to-analog converter
  • A circuit for increasing the digital data transmission rate in a digital-to-analog converter

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Embodiment

[0043] Under the condition of 0.18um process, the limit processing data rate of the present invention is 4Gbps.

[0044] Taking the 14bit 2.5GSPS DA converter as an example, its original data rate is 2.5Gbps. Using this circuit to realize data synchronization requires two channels of data input after deinterleaving. The data rate of each channel is 1.25Gbps, and the data rate of each channel is The data clock frequency is 1.25GHz. Under the condition of 0.18um CMOS technology, the chip area required to realize the power consumption of timing synchronization at 1.25GHz is much smaller than the requirement of 2.5GHz. The synthesized data rate is 2.5Gbps, which is the same as the original data rate.

[0045] Table 1 is a comparison table of power consumption using this circuit under different processes and different speeds:

[0046] Table 1

[0047] craft

[0048] It can be seen from the above table that under the same conditions, using this method can greatly reduce ...

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Abstract

A circuit for increasing the transmission rate of digital data in a digital-to-analog converter, which uses two data ports to input data through data deinterleaving encoding, which reduces the data rate requirement of each port and the control difficulty of the back-end synchronization circuit; In the process of data transmission, the clocks of the two channels of data are synchronously controlled to reduce the timing error of the two channels of data, which is beneficial to the synthesis of the back-end data; the two channels of data are synthesized at the front end of the switch part of the digital-to-analog converter to generate high frequency data, improving the refresh rate of the output signal of the digital-to-analog converter.

Description

technical field [0001] The invention relates to a circuit for increasing the transmission rate of digital data, in particular to a circuit for increasing the transmission rate of digital data in a digital-to-analog converter, belonging to the technical field of digital-to-analog converters. Background technique [0002] The digital data transmission rate of transmit digital-to-analog converters used in military equipment such as wireless communication equipment and radar is an important index to measure the performance of digital-to-analog converters. The digital data transmission rate restricts the frequency of the final output data. Generally speaking, according to the Nyquist sampling theorem, the frequency of the output data is at most half of the data rate, that is, when the output frequency increases, the requirements for the digital data transmission rate also increase. Increase accordingly, and require twice the output frequency. [0003] In transmitting digital-to-...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/66
Inventor 赵元富文治平王宗民陈飞祥彭新芒侯贺刚
Owner BEIJING MXTRONICS CORP
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