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mirror array in digital pattern generator (dpg)

A mirror array, digital pattern technology, applied in the semiconductor field, can solve the problems of consumption, multi-cost and time resources, etc.

Active Publication Date: 2017-08-25
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Specifically, this verification consumes more cost and time resources as the mirror array size increases
Therefore, although existing photolithographic methods generally meet the requirements, they do not meet the requirements in all aspects

Method used

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  • mirror array in digital pattern generator (dpg)
  • mirror array in digital pattern generator (dpg)
  • mirror array in digital pattern generator (dpg)

Examples

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Embodiment Construction

[0030] It should be understood that the following disclosure provides many different embodiments or examples for implementing different features of the invention. Specific examples of components or configurations are described below to simplify the present invention. Of course, these are merely examples and not intended to be limiting. For example, in the description below, forming a first feature on or over a second feature may include embodiments in which the first feature and the second feature are formed in direct contact, and may also include embodiments in which the first feature and the second feature may be formed in direct contact. An embodiment in which the part forms an accessory part such that the first part and the second part are not in direct contact. Various features may be arbitrarily drawn in different scales for simplicity and clarity.

[0031] figure 1 An embodiment of an electron beam lithography system 100 is shown. Electron beam lithography system 10...

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Abstract

Systems and methods for digital pattern generators (DPGs) with mirror arrays in electron beam lithography systems are discussed. The mirror array includes a first mirror bank and a second mirror bank, wherein a combinatorial logic structure is interposed between the first mirror bank and the second mirror bank. Output data lines extend from the first reflective library mirror to the combinatorial logic structure. An input data line carrying data associated with the second mirror bank is also provided to the combinatorial logic structure. An output data line extends from the combinational logic structure to the second database.

Description

technical field [0001] The present invention relates generally to the field of semiconductor technology, and more particularly to electron beam lithography systems. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) has generally increased while geometry size (ie, the smallest component (or line) that can be made using a fabrication process) has decreased. This shrinking process often offers advantages by increasing production efficiency and reducing associated costs. This scaling also increases the complexity of handling and manufacturing ICs, requiring similar developments in IC manufacturing for these advances to be realized. [0003] For example, as the semiconductor industry moves to smaller technology process nodes in pursuit of greater device density, higher performance, and lower cost, there are more ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G03F7/20
CPCH01J37/3175H01J37/3023H01J2237/30405H01J2237/31789H01L21/0275G03F7/70491
Inventor 余宗欣
Owner TAIWAN SEMICON MFG CO LTD
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